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[Stable-9.0.1 54/71] target/riscv/kvm: tolerate KVM disable ext errors
From: |
Michael Tokarev |
Subject: |
[Stable-9.0.1 54/71] target/riscv/kvm: tolerate KVM disable ext errors |
Date: |
Fri, 7 Jun 2024 22:13:35 +0300 |
From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Running a KVM guest using a 6.9-rc3 kernel, in a 6.8 host that has zkr
enabled, will fail with a kernel oops SIGILL right at the start. The
reason is that we can't expose zkr without implementing the SEED CSR.
Disabling zkr in the guest would be a workaround, but if the KVM doesn't
allow it we'll error out and never boot.
In hindsight this is too strict. If we keep proceeding, despite not
disabling the extension in the KVM vcpu, we'll not add the extension in
the riscv,isa. The guest kernel will be unaware of the extension, i.e.
it doesn't matter if the KVM vcpu has it enabled underneath or not. So
it's ok to keep booting in this case.
Change our current logic to not error out if we fail to disable an
extension in kvm_set_one_reg(), but show a warning and keep booting. It
is important to throw a warning because we must make the user aware that
the extension is still available in the vcpu, meaning that an
ill-behaved guest can ignore the riscv,isa settings and use the
extension.
The case we're handling happens with an EINVAL error code. If we fail to
disable the extension in KVM for any other reason, error out.
We'll also keep erroring out when we fail to enable an extension in KVM,
since adding the extension in riscv,isa at this point will cause a guest
malfunction because the extension isn't enabled in the vcpu.
Suggested-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Cc: qemu-stable <qemu-stable@nongnu.org>
Message-ID: <20240422171425.333037-2-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
(cherry picked from commit 1215d45b2aa97512a2867e401aa59f3d0c23cb23)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c
index 243a624fee..5187b88ad9 100644
--- a/target/riscv/kvm/kvm-cpu.c
+++ b/target/riscv/kvm/kvm-cpu.c
@@ -427,10 +427,14 @@ static void kvm_riscv_update_cpu_cfg_isa_ext(RISCVCPU
*cpu, CPUState *cs)
reg = kvm_cpu_cfg_get(cpu, multi_ext_cfg);
ret = kvm_set_one_reg(cs, id, ®);
if (ret != 0) {
- error_report("Unable to %s extension %s in KVM, error %d",
- reg ? "enable" : "disable",
- multi_ext_cfg->name, ret);
- exit(EXIT_FAILURE);
+ if (!reg && ret == -EINVAL) {
+ warn_report("KVM cannot disable extension %s",
+ multi_ext_cfg->name);
+ } else {
+ error_report("Unable to enable extension %s in KVM, error %d",
+ multi_ext_cfg->name, ret);
+ exit(EXIT_FAILURE);
+ }
}
}
}
--
2.39.2
- [Stable-9.0.1 00/71] Patch Round-up for stable 9.0.1, frozen on 2024-06-07, Michael Tokarev, 2024/06/07
- [Stable-9.0.1 45/71] gitlab: use $MAKE instead of 'make', Michael Tokarev, 2024/06/07
- [Stable-9.0.1 46/71] gitlab: use 'setarch -R' to workaround tsan bug, Michael Tokarev, 2024/06/07
- [Stable-9.0.1 47/71] hvf: arm: Fix encodings for ID_AA64PFR1_EL1 and debug System registers, Michael Tokarev, 2024/06/07
- [Stable-9.0.1 48/71] hw/intc/arm_gic: Fix handling of NS view of GICC_APR<n>, Michael Tokarev, 2024/06/07
- [Stable-9.0.1 49/71] target/arm: Disable SVE extensions when SVE is disabled, Michael Tokarev, 2024/06/07
- [Stable-9.0.1 50/71] qio: Inherit follow_coroutine_ctx across TLS, Michael Tokarev, 2024/06/07
- [Stable-9.0.1 51/71] iotests: test NBD+TLS+iothread, Michael Tokarev, 2024/06/07
- [Stable-9.0.1 52/71] hw/intc/riscv_aplic: APLICs should add child earlier than realize, Michael Tokarev, 2024/06/07
- [Stable-9.0.1 53/71] target/riscv/kvm: Fix exposure of Zkr, Michael Tokarev, 2024/06/07
- [Stable-9.0.1 54/71] target/riscv/kvm: tolerate KVM disable ext errors,
Michael Tokarev <=
- [Stable-9.0.1 55/71] target/riscv: Fix the element agnostic function problem, Michael Tokarev, 2024/06/07
- [Stable-9.0.1 57/71] target/riscv: rvv: Fix Zvfhmin checking for vfwcvt.f.f.v and vfncvt.f.f.w instructions, Michael Tokarev, 2024/06/07
- [Stable-9.0.1 56/71] target/riscv/cpu.c: fix Zvkb extension config, Michael Tokarev, 2024/06/07
- [Stable-9.0.1 58/71] target/riscv: rvv: Check single width operator for vector fp widen instructions, Michael Tokarev, 2024/06/07
- [Stable-9.0.1 59/71] target/riscv: rvv: Check single width operator for vfncvt.rod.f.f.w, Michael Tokarev, 2024/06/07
- [Stable-9.0.1 60/71] target/riscv: rvv: Remove redudant SEW checking for vector fp narrow/widen instructions, Michael Tokarev, 2024/06/07
- [Stable-9.0.1 61/71] target/riscv: prioritize pmp errors in raise_mmu_exception(), Michael Tokarev, 2024/06/07
- [Stable-9.0.1 62/71] target/riscv: do not set mtval2 for non guest-page faults, Michael Tokarev, 2024/06/07
- [Stable-9.0.1 63/71] target/riscv: rvzicbo: Fixup CBO extension register calculation, Michael Tokarev, 2024/06/07
- [Stable-9.0.1 64/71] target/riscv/kvm.c: Fix the hart bit setting of AIA, Michael Tokarev, 2024/06/07