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[PULL 02/25] i386/cpu: fixup number of addressable IDs for processor cor
From: |
Paolo Bonzini |
Subject: |
[PULL 02/25] i386/cpu: fixup number of addressable IDs for processor cores in the physical package |
Date: |
Tue, 11 Jun 2024 16:25:00 +0200 |
From: Chuang Xu <xuchuangxclwt@bytedance.com>
When QEMU is started with:
-cpu host,host-cache-info=on,l3-cache=off \
-smp 2,sockets=1,dies=1,cores=1,threads=2
Guest can't acquire maximum number of addressable IDs for processor cores in
the physical package from CPUID[04H].
When creating a CPU topology of 1 core per package, host-cache-info only
uses the Host's addressable core IDs field (CPUID.04H.EAX[bits 31-26]),
resulting in a conflict (on the multicore Host) between the Guest core
topology information in this field and the Guest's actual cores number.
Fix it by removing the unnecessary condition to cover 1 core per package
case. This is safe because cores_per_pkg will not be 0 and will be at
least 1.
Fixes: d7caf13b5fcf ("x86: cpu: fixup number of addressable IDs for logical
processors sharing cache")
Signed-off-by: Guixiong Wei <weiguixiong@bytedance.com>
Signed-off-by: Yipeng Yin <yinyipeng@bytedance.com>
Signed-off-by: Chuang Xu <xuchuangxclwt@bytedance.com>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Message-ID: <20240611032314.64076-1-xuchuangxclwt@bytedance.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target/i386/cpu.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 7466217d5ea..365852cb99e 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -6455,10 +6455,8 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index,
uint32_t count,
if (*eax & 31) {
int host_vcpus_per_cache = 1 + ((*eax & 0x3FFC000) >> 14);
- if (cores_per_pkg > 1) {
- *eax &= ~0xFC000000;
- *eax |= max_core_ids_in_package(&topo_info) << 26;
- }
+ *eax &= ~0xFC000000;
+ *eax |= max_core_ids_in_package(&topo_info) << 26;
if (host_vcpus_per_cache > threads_per_pkg) {
*eax &= ~0x3FFC000;
--
2.45.1
- [PULL 00/25] target/i386, SCSI changes for 2024-06-11, Paolo Bonzini, 2024/06/11
- [PULL 01/25] scsi-disk: Fix crash for VM configured with USB CDROM after live migration, Paolo Bonzini, 2024/06/11
- [PULL 03/25] i386/sev: fix unreachable code coverity issue, Paolo Bonzini, 2024/06/11
- [PULL 02/25] i386/cpu: fixup number of addressable IDs for processor cores in the physical package,
Paolo Bonzini <=
- [PULL 04/25] i386/sev: Move SEV_COMMON null check before dereferencing, Paolo Bonzini, 2024/06/11
- [PULL 07/25] target/i386: rewrite flags writeback for ADCX/ADOX, Paolo Bonzini, 2024/06/11
- [PULL 05/25] i386/sev: Return when sev_common is null, Paolo Bonzini, 2024/06/11
- [PULL 08/25] target/i386: put BLS* input in T1, use generic flag writeback, Paolo Bonzini, 2024/06/11
- [PULL 06/25] target/i386: remove CPUX86State argument from generator functions, Paolo Bonzini, 2024/06/11
- [PULL 09/25] target/i386: change X86_ENTRYr to use T0, Paolo Bonzini, 2024/06/11
- [PULL 10/25] target/i386: change X86_ENTRYwr to use T0, use it for moves, Paolo Bonzini, 2024/06/11
- [PULL 11/25] target/i386: replace NoSeg special with NoLoadEA, Paolo Bonzini, 2024/06/11
- [PULL 12/25] target/i386: fix processing of intercept 0 (read CR0), Paolo Bonzini, 2024/06/11
- [PULL 13/25] target/i386: convert MOV from/to CR and DR to new decoder, Paolo Bonzini, 2024/06/11