qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH] Hexagon: lldb read/write predicate registers p0/p1/p2/p3


From: Matheus Tavares Bernardino
Subject: Re: [PATCH] Hexagon: lldb read/write predicate registers p0/p1/p2/p3
Date: Wed, 12 Jun 2024 15:30:08 -0300

On Wed, 12 Jun 2024 10:42:39 -0600 Taylor Simpson <ltaylorsimpson@gmail.com> 
wrote:
>
> diff --git a/target/hexagon/gdbstub.c b/target/hexagon/gdbstub.c
> index 502c6987f0..e67e627fc9 100644
> --- a/target/hexagon/gdbstub.c
> +++ b/target/hexagon/gdbstub.c
> @@ -56,6 +64,15 @@ int hexagon_gdb_write_register(CPUState *cs, uint8_t 
> *mem_buf, int n)
>          return sizeof(target_ulong);
>      }
>  
> +    n -= TOTAL_PER_THREAD_REGS;
> +
> +    if (n < NUM_PREGS) {
> +        env->pred[n] = ldtul_p(mem_buf);
> +        return sizeof(uint8_t);

I wonder, shouldn't this be sizeof(target_ulong) since we wrote a target_ulong?

> +    }
> +
> +    n -= NUM_PREGS;
> +
>      g_assert_not_reached();
>  }



reply via email to

[Prev in Thread] Current Thread [Next in Thread]