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[PATCH qemu 0/1] target/riscv: Add Zilsd and Zcmlsd extension support


From: ~liuxu
Subject: [PATCH qemu 0/1] target/riscv: Add Zilsd and Zcmlsd extension support
Date: Tue, 02 Jul 2024 08:59:14 +0000

This patch adds support for the Zilsd and Zcmlsd extension,
which is documented at https://github.com/riscv/riscv-
zilsd/releases/tag/v0.9.0

lxx (1):
  target/riscv: Add Zilsd and Zcmlsd extension support

 target/riscv/cpu.c                         |  4 +
 target/riscv/cpu_cfg.h                     |  2 +
 target/riscv/insn16.decode                 |  8 ++
 target/riscv/insn32.decode                 | 12 ++-
 target/riscv/insn_trans/trans_zcmlsd.c.inc | 98 ++++++++++++++++++++++
 target/riscv/insn_trans/trans_zilsd.c.inc  | 97 +++++++++++++++++++++
 target/riscv/tcg/tcg-cpu.c                 | 13 +++
 target/riscv/translate.c                   |  2 +
 8 files changed, 234 insertions(+), 2 deletions(-)
 create mode 100644 target/riscv/insn_trans/trans_zcmlsd.c.inc
 create mode 100644 target/riscv/insn_trans/trans_zilsd.c.inc

-- 
2.43.4



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