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[PATCH v3 10/11] target/riscv: Expose zabha extension as a cpu property
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From: |
LIU Zhiwei |
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Subject: |
[PATCH v3 10/11] target/riscv: Expose zabha extension as a cpu property |
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Date: |
Wed, 3 Jul 2024 09:46:34 +0800 |
Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
target/riscv/cpu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 5219b44176..8cd52e6801 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -117,6 +117,7 @@ const RISCVIsaExtData isa_edata_arr[] = {
ISA_EXT_DATA_ENTRY(zmmul, PRIV_VERSION_1_12_0, ext_zmmul),
ISA_EXT_DATA_ENTRY(za64rs, PRIV_VERSION_1_12_0, has_priv_1_11),
ISA_EXT_DATA_ENTRY(zaamo, PRIV_VERSION_1_12_0, ext_zaamo),
+ ISA_EXT_DATA_ENTRY(zabha, PRIV_VERSION_1_13_0, ext_zabha),
ISA_EXT_DATA_ENTRY(zacas, PRIV_VERSION_1_12_0, ext_zacas),
ISA_EXT_DATA_ENTRY(zama16b, PRIV_VERSION_1_13_0, ext_zama16b),
ISA_EXT_DATA_ENTRY(zalrsc, PRIV_VERSION_1_12_0, ext_zalrsc),
@@ -1478,6 +1479,7 @@ const RISCVCPUMultiExtConfig riscv_cpu_extensions[] = {
MULTI_EXT_CFG_BOOL("zcmop", ext_zcmop, false),
MULTI_EXT_CFG_BOOL("zacas", ext_zacas, false),
MULTI_EXT_CFG_BOOL("zama16b", ext_zama16b, false),
+ MULTI_EXT_CFG_BOOL("zabha", ext_zabha, false),
MULTI_EXT_CFG_BOOL("zaamo", ext_zaamo, false),
MULTI_EXT_CFG_BOOL("zalrsc", ext_zalrsc, false),
MULTI_EXT_CFG_BOOL("zawrs", ext_zawrs, true),
--
2.25.1
- [PATCH v3 00/11] target/riscv: Support zimop/zcmop/zama16b/zabha, LIU Zhiwei, 2024/07/02
- [PATCH v3 01/11] target/riscv: Add zimop extension, LIU Zhiwei, 2024/07/02
- [PATCH v3 02/11] disas/riscv: Support zimop disassemble, LIU Zhiwei, 2024/07/02
- [PATCH v3 03/11] target/riscv: Add zcmop extension, LIU Zhiwei, 2024/07/02
- [PATCH v3 04/11] disas/riscv: Support zcmop disassemble, LIU Zhiwei, 2024/07/02
- [PATCH v3 06/11] target/riscv: Move gen_amo before implement Zabha, LIU Zhiwei, 2024/07/02
- [PATCH v3 07/11] target/riscv: Add AMO instructions for Zabha, LIU Zhiwei, 2024/07/02
- [PATCH v3 08/11] target/riscv: Move gen_cmpxchg before adding amocas.[b|h], LIU Zhiwei, 2024/07/02
- [PATCH v3 09/11] target/riscv: Add amocas.[b|h] for Zabha, LIU Zhiwei, 2024/07/02
- [PATCH v3 10/11] target/riscv: Expose zabha extension as a cpu property,
LIU Zhiwei <=
- [PATCH v3 11/11] disas/riscv: Support zabha disassemble, LIU Zhiwei, 2024/07/02
- [PATCH v3 05/11] target/riscv: Support Zama16b extension, LIU Zhiwei, 2024/07/02
- Re: [PATCH v3 00/11] target/riscv: Support zimop/zcmop/zama16b/zabha, Alistair Francis, 2024/07/02