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Re: [PATCH v4 18/19] hw/arm/smmuv3: Advertise S2FWB
From: |
Jean-Philippe Brucker |
Subject: |
Re: [PATCH v4 18/19] hw/arm/smmuv3: Advertise S2FWB |
Date: |
Thu, 4 Jul 2024 19:36:58 +0100 |
On Mon, Jul 01, 2024 at 11:02:40AM +0000, Mostafa Saleh wrote:
> QEMU doesn's support memory attributes, so FWB is NOP, this
> might change in the future if memory attributre would be supported.
>
> Signed-off-by: Mostafa Saleh <smostafa@google.com>
> ---
> hw/arm/smmuv3.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
> index 807f26f2da..88378e83dd 100644
> --- a/hw/arm/smmuv3.c
> +++ b/hw/arm/smmuv3.c
> @@ -287,6 +287,14 @@ static void smmuv3_init_regs(SMMUv3State *s)
> if (FIELD_EX32(s->idr[0], IDR0, S2P)) {
> /* XNX is a stage-2-specific feature */
> s->idr[3] = FIELD_DP32(s->idr[3], IDR3, XNX, 1);
> + if (FIELD_EX32(s->idr[0], IDR0, S1P)) {
Why is this check needed?
> + /*
> + * QEMU doesn's support memory attributes, so FWB is NOP, this
doesn't
Thanks,
Jean
> + * might change in the future if memory attributre would be
> + * supported.
> + */
> + s->idr[3] = FIELD_DP32(s->idr[3], IDR3, FWB, 1);
> + }
> }
> s->idr[3] = FIELD_DP32(s->idr[3], IDR3, RIL, 1);
> s->idr[3] = FIELD_DP32(s->idr[3], IDR3, BBML, 2);
> --
> 2.45.2.803.g4e1b14247a-goog
>
[PATCH v4 14/19] hw/arm/smmu: Support nesting in the rest of commands, Mostafa Saleh, 2024/07/01
[PATCH v4 19/19] hw/arm/smmu: Refactor SMMU OAS, Mostafa Saleh, 2024/07/01
[PATCH v4 17/19] hw/arm/smmuv3: Support and advertise nesting, Mostafa Saleh, 2024/07/01