[PATCH 0/3] Resolve vt82c686 and piix4 qemu_irq memory leaks

[Bernhard Beschow]

This series first turns vt82c686's "INTR" pin into a named GPIO for better
comprehensibility. It then continues fixing qemu_irq memory leaks in vt82c686
and piix4 by connecting out IRQs of the south bridges before they get realized.
This approach is already used in the pc machines after it had been discussed at
KVM forum `23.

Observe that out IRQs are callbacks such as an INTR IRQ handler in a CPU which a
south bridge wants to trigger. If, as an implementation detail, the south bridge
wants to pass this callback to a child device, such as the PIC, then this
callback must be known to the south bridge before it gets realized. Otherwise
board code had to wire the PIC device itself, breaking encapsulation. This means
that qdev_connect_gpio_out*() has to be called before realize() which this
series implements. Another way to look at it is that callbacks apparently are
resouces such as memory regions which are also populated before realize().

Please check if above paragraph makes sense.

Best regards,
Bernhard

See also:
* https://lore.kernel.org/qemu-devel/0FFB5FD2-08CE-4CEC-9001-E7AC24407A44@gmail.
com/
* "Remove intermediate IRQ forwarder" patches in
https://lore.kernel.org/qemu-devel/20230210163744.32182-1-philmd@linaro.org/

Testing done:
* Boot amigaone machine into Linux
* Boot pegasos2 machine into MorphOS
* Start fuloong2e machine and check that it doesn't abort
* Boot malta machine with https://people.debian.org/~gio/dqib/

Bernhard Beschow (3):
  hw/isa/vt82c686: Turn "intr" irq into a named gpio
  hw/isa/vt82c686: Resolve intermediate IRQ forwarder
  hw/isa/piix: Resolve intermediate IRQ forwarder

 hw/isa/piix.c       | 13 ++-----------
 hw/isa/vt82c686.c   | 12 ++----------
 hw/mips/fuloong2e.c |  2 +-
 hw/mips/malta.c     |  4 +---
 hw/ppc/amigaone.c   |  8 ++++----
 hw/ppc/pegasos2.c   |  4 ++--
 6 files changed, 12 insertions(+), 31 deletions(-)

-- 
2.45.2