Re: [PATCH v2 1/3] intel_iommu: fix FRCD construction macro.

[Yi Liu]

On 2024/7/4 23:12, CLEMENT MATHIEU--DRIF wrote:
> From: Clément Mathieu--Drif <clement.mathieu--drif@eviden.com>
>
> The constant must be unsigned, otherwise the two's complement
> overrides the other fields when a PASID is present

I'm not native speaker. But it's better to see a "." in the end
of the sentence. :)

> Fixes: 1b2b12376c ("intel-iommu: PASID support")

you need more digits per the result of "grep Fixes 
docs/devel/submitting-a-patch.rst".

docs/devel/submitting-a-patch.rst:add an additional line with "Fixes: 
<at-least-12-digits-of-SHA-commit-id>

> Signed-off-by: Clément Mathieu--Drif <clement.mathieu--drif@eviden.com>
> Reviewed-by: Yi Liu <yi.l.liu@intel.com>
> ---
>   hw/i386/intel_iommu_internal.h | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h
> index f8cf99bddf..cbc4030031 100644
> --- a/hw/i386/intel_iommu_internal.h
> +++ b/hw/i386/intel_iommu_internal.h
> @@ -267,7 +267,7 @@
>   /* For the low 64-bit of 128-bit */
>   #define VTD_FRCD_FI(val)        ((val) & ~0xfffULL)
>   #define VTD_FRCD_PV(val)        (((val) & 0xffffULL) << 40)
> -#define VTD_FRCD_PP(val)        (((val) & 0x1) << 31)
> +#define VTD_FRCD_PP(val)        (((val) & 0x1ULL) << 31)
>   #define VTD_FRCD_IR_IDX(val)    (((val) & 0xffffULL) << 48)
>   
>   /* DMA Remapping Fault Conditions */

--
Regards,
Yi Liu