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[PATCH v2 8/8] bsd-user:Add AArch64 improvements and signal handling fun
From: |
Ajeet Singh |
Subject: |
[PATCH v2 8/8] bsd-user:Add AArch64 improvements and signal handling functions |
Date: |
Mon, 8 Jul 2024 00:41:28 +0530 |
From: Stacey Son <sson@FreeBSD.org>
Added get_ucontext_sigreturn function to check processor state ensuring current
execution mode is EL0 and no flags
indicating interrupts or exceptions are set.
Updated AArch64 code to use CF directly without reading/writing the entire
processor state, improving efficiency.
Changed FP data structures to use Int128 instead of __uint128_t, leveraging
QEMU's generic mechanism for referencing this type.
Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Ajeet Singh <itachis@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
---
bsd-user/aarch64/signal.c | 20 +++++++++++++++++++-
bsd-user/aarch64/target_arch_cpu.h | 7 ++-----
bsd-user/aarch64/target_arch_reg.h | 2 +-
bsd-user/aarch64/target_arch_signal.h | 2 +-
bsd-user/qemu.h | 3 +++
5 files changed, 26 insertions(+), 8 deletions(-)
diff --git a/bsd-user/aarch64/signal.c b/bsd-user/aarch64/signal.c
index 13faac8ce6..6bc73a798f 100644
--- a/bsd-user/aarch64/signal.c
+++ b/bsd-user/aarch64/signal.c
@@ -21,7 +21,7 @@
#include "qemu.h"
/*
- * Compare to sendsig() in sys/arm64/arm64/machdep.c
+ * Compare to sendsig() in sys/arm64/arm64/exec_machdep.c
* Assumes that target stack frame memory is locked.
*/
abi_long set_sigtramp_args(CPUARMState *regs, int sig,
@@ -117,3 +117,21 @@ abi_long set_mcontext(CPUARMState *regs, target_mcontext_t
*mcp, int srflag)
return err;
}
+
+/* Compare to sys_sigreturn() in arm64/arm64/machdep.c */
+abi_long get_ucontext_sigreturn(CPUARMState *regs, abi_ulong target_sf,
+ abi_ulong *target_uc)
+{
+ uint32_t pstate = pstate_read(regs);
+
+ *target_uc = 0;
+
+ if ((pstate & PSTATE_M) != PSTATE_MODE_EL0t ||
+ (pstate & (PSTATE_F | PSTATE_I | PSTATE_A | PSTATE_D)) != 0) {
+ return -TARGET_EINVAL;
+ }
+
+ *target_uc = target_sf;
+
+ return 0;
+}
diff --git a/bsd-user/aarch64/target_arch_cpu.h
b/bsd-user/aarch64/target_arch_cpu.h
index 4e950305d3..408aef2bb5 100644
--- a/bsd-user/aarch64/target_arch_cpu.h
+++ b/bsd-user/aarch64/target_arch_cpu.h
@@ -47,7 +47,6 @@ static inline void target_cpu_loop(CPUARMState *env)
CPUState *cs = env_cpu(env);
int trapnr, ec, fsc, si_code, si_signo;
uint64_t code, arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8;
- uint32_t pstate;
abi_long ret;
for (;;) {
@@ -87,18 +86,16 @@ static inline void target_cpu_loop(CPUARMState *env)
* The carry bit is cleared for no error; set for error.
* See arm64/arm64/vm_machdep.c cpu_set_syscall_retval()
*/
- pstate = pstate_read(env);
if (ret >= 0) {
- pstate &= ~PSTATE_C;
+ env->CF = 0;
env->xregs[0] = ret;
} else if (ret == -TARGET_ERESTART) {
env->pc -= 4;
break;
} else if (ret != -TARGET_EJUSTRETURN) {
- pstate |= PSTATE_C;
+ env->CF = 1;
env->xregs[0] = -ret;
}
- pstate_write(env, pstate);
break;
case EXCP_INTERRUPT:
diff --git a/bsd-user/aarch64/target_arch_reg.h
b/bsd-user/aarch64/target_arch_reg.h
index 5c7154f0c1..b53302e7f7 100644
--- a/bsd-user/aarch64/target_arch_reg.h
+++ b/bsd-user/aarch64/target_arch_reg.h
@@ -31,7 +31,7 @@ typedef struct target_reg {
} target_reg_t;
typedef struct target_fpreg {
- __uint128_t fp_q[32];
+ Int128 fp_q[32];
uint32_t fp_sr;
uint32_t fp_cr;
} target_fpreg_t;
diff --git a/bsd-user/aarch64/target_arch_signal.h
b/bsd-user/aarch64/target_arch_signal.h
index df17173316..bff752a67a 100644
--- a/bsd-user/aarch64/target_arch_signal.h
+++ b/bsd-user/aarch64/target_arch_signal.h
@@ -49,7 +49,7 @@ struct target_gpregs {
};
struct target_fpregs {
- __uint128_t fp_q[32];
+ Int128 fp_q[32];
uint32_t fp_sr;
uint32_t fp_cr;
uint32_t fp_flags;
diff --git a/bsd-user/qemu.h b/bsd-user/qemu.h
index 9d2fc7148e..3736c41786 100644
--- a/bsd-user/qemu.h
+++ b/bsd-user/qemu.h
@@ -17,6 +17,9 @@
#ifndef QEMU_H
#define QEMU_H
+#include <sys/param.h>
+
+#include "qemu/int128.h"
#include "cpu.h"
#include "qemu/units.h"
#include "exec/cpu_ldst.h"
--
2.34.1
- [PATCH v2 0/8] ARM AArch64 Support for BSD, Ajeet Singh, 2024/07/07
- [PATCH v2 1/8] bsd-user:Add CPU initialization and management functions, Ajeet Singh, 2024/07/07
- [PATCH v2 2/8] bsd-user:Add AArch64 register handling and related functions, Ajeet Singh, 2024/07/07
- [PATCH v2 3/8] bsd-user:Add ARM AArch64 support and capabilities, Ajeet Singh, 2024/07/07
- [PATCH v2 4/8] bsd-user:Add ARM AArch64 signal handling support, Ajeet Singh, 2024/07/07
- [PATCH v2 5/8] bsd-user:Add get_mcontext function for ARM AArch64, Ajeet Singh, 2024/07/07
- [PATCH v2 6/8] bsd-user:Add setup_sigframe_arch function for ARM AArch64, Ajeet Singh, 2024/07/07
- [PATCH v2 7/8] bsd-user:Add set_mcontext function for ARM AArch64, Ajeet Singh, 2024/07/07
- [PATCH v2 8/8] bsd-user:Add AArch64 improvements and signal handling functions,
Ajeet Singh <=
- Re: [PATCH v2 0/8] ARM AArch64 Support for BSD, Warner Losh, 2024/07/21