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Re: [PATCH v4 00/14] riscv: QEMU RISC-V IOMMU Support
From: |
Alistair Francis |
Subject: |
Re: [PATCH v4 00/14] riscv: QEMU RISC-V IOMMU Support |
Date: |
Mon, 8 Jul 2024 12:18:15 +1000 |
On Sat, Jul 6, 2024 at 7:26 AM Daniel Henrique Barboza
<dbarboza@ventanamicro.com> wrote:
>
> Hi,
>
> Would it make it easier for review if we squash patch 3:
>
> [PATCH v4 03/14] hw/riscv: add RISC-V IOMMU base emulation
>
> and patch 8:
>
> [PATCH v4 09/14] hw/riscv/riscv-iommu: add s-stage and g-stage support
>
> In the same patch?
>
> I'm asking because I've been noticing since the first versions that some
> reviews
> on patch 3 seems to refer to context that are s-stage and g-stage related,
> i.e.
> added later. Perhaps squashing them together makes it easier to review since
> we'll have a more complete picture. Patch 3 will end up gaining +381 lines
> though.
Squashing is probably the way to go
Alistair