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[PATCH v5 3/4] intel_iommu: fix type of the mask field in VTDIOTLBPageI


From: CLEMENT MATHIEU--DRIF
Subject: [PATCH v5 3/4] intel_iommu: fix type of the mask field in VTDIOTLBPageInvInfo
Date: Mon, 8 Jul 2024 11:39:54 +0000

From: Clément Mathieu--Drif <clement.mathieu--drif@eviden.com>

The mask we are trying to store into VTDIOTLBPageInvInfo.mask might not
fit in an uint8_t. Use uint64_t to avoid overflows.

Per the below code, it can overflow as am can be larger than 8 according
to the CH 6.5.2.3 IOTLB Invalidate. And you may want a fix tag as well.

info.mask = ~((1 << am) - 1);

CH 6.5.2.3 IOTLB Invalidate

Address Mask (AM): For page-selective-within-domain invalidations,
the Address Mask specifies the number of low order bits of the ADDR
field that must be masked for the invalidation operation. This field
enables software to request invalidation of contiguous mappings for
size-aligned regions. Refer to Table 19 for encodings of this field.
When invalidating a large-page translation, software must use the
appropriate Address Mask value (0 for 4KByte page, 9 for 2-MByte page,
and 18 for 1-GByte page). Hardware implementations report the maximum
supported address mask value through the Capability register.

Signed-off-by: Clément Mathieu--Drif <clement.mathieu--drif@eviden.com>
---
 hw/i386/intel_iommu_internal.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h
index faea23e8d6..5f32c36943 100644
--- a/hw/i386/intel_iommu_internal.h
+++ b/hw/i386/intel_iommu_internal.h
@@ -436,7 +436,7 @@ struct VTDIOTLBPageInvInfo {
     uint16_t domain_id;
     uint32_t pasid;
     uint64_t addr;
-    uint8_t mask;
+    uint64_t mask;
 };
 typedef struct VTDIOTLBPageInvInfo VTDIOTLBPageInvInfo;
 
-- 
2.45.2

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