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[PATCH 0/6] target/arm: AdvSIMD decodetree conversion, part 3


From: Richard Henderson
Subject: [PATCH 0/6] target/arm: AdvSIMD decodetree conversion, part 3
Date: Mon, 8 Jul 2024 16:59:30 -0700

A small set, but better than waiting for a larger set.
It's a good stopping point, finishing the convertion of

  disas_simd_three_reg_diff
  disas_simd_scalar_three_reg_diff
  disas_simd_indexed


r~


Richard Henderson (6):
  target/arm: Convert SMULL, UMULL, SMLAL, UMLAL, SMLSL, UMLSL to
    decodetree
  target/arm: Convert SADDL, SSUBL, SABDL, SABAL, and unsigned to
    decodetree
  target/arm: Convert SQDMULL, SQDMLAL, SQDMLSL to decodetree
  target/arm: Convert SADDW, SSUBW, UADDW, USUBW to decodetree
  target/arm: Convert ADDHN, SUBHN, RADDHN, RSUBHN to decodetree
  target/arm: Convert PMULL to decodetree

 target/arm/tcg/translate-a64.c | 1155 +++++++++++---------------------
 target/arm/tcg/a64.decode      |   77 +++
 2 files changed, 460 insertions(+), 772 deletions(-)

-- 
2.43.0




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