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[PATCH v5 7/7] tests/avocado: Add an avocado test for riscv64
From: |
LIU Zhiwei |
Subject: |
[PATCH v5 7/7] tests/avocado: Add an avocado test for riscv64 |
Date: |
Wed, 10 Jul 2024 10:24:30 +0800 |
From: TANG Tiancheng <tangtiancheng.ttc@alibaba-inc.com>
To regularly test booting Linux with rv32 on QEMU RV64,
we have added a test to boot_linux_console.py to retrieve
cpuinfo and verify if it shows 'rv32' when using RV64 to
boot rv32 CPUs.
Signed-off-by: TANG Tiancheng <tangtiancheng.ttc@alibaba-inc.com>
Reviewed-by: Liu Zhiwei <zhiwei_liu@linux.alibaba.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
---
tests/avocado/boot_linux_console.py | 38 +++++++++++++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/tests/avocado/boot_linux_console.py
b/tests/avocado/boot_linux_console.py
index c35fc5e9ba..6d2f3b05cb 100644
--- a/tests/avocado/boot_linux_console.py
+++ b/tests/avocado/boot_linux_console.py
@@ -12,6 +12,7 @@
import lzma
import gzip
import shutil
+import time
from avocado import skip
from avocado import skipUnless
@@ -1545,3 +1546,40 @@ def test_xtensa_lx60(self):
"""
tar_hash = '49e88d9933742f0164b60839886c9739cb7a0d34'
self.do_test_advcal_2018('02', tar_hash, 'santas-sleigh-ride.elf')
+
+ def test_riscv64_virt_rv32i(self):
+ """
+ :avocado: tags=arch:riscv64
+ :avocado: tags=machine:virt
+ :avocado: tags=cpu:rv32
+ """
+ kernel_url = ('https://github.com/romanheros/rv32-linux/raw/master/'
+ 'Image32.xz')
+ kernel_hash = 'a7ced5c38722481e0821b7cd70719cf53e46c13b'
+ kernel_path_xz = self.fetch_asset(kernel_url, asset_hash=kernel_hash)
+
+ kernel_path = os.path.join(self.workdir, 'kernel.riscv32')
+ archive.lzma_uncompress(kernel_path_xz, kernel_path)
+
+ rootfs_url = ('https://github.com/romanheros/rv32-linux/raw/master/'
+ 'rootfs.ext2.xz')
+ rootfs_hash = 'dc25ab9d4b233e8e0bcf7eb220d56fd2008fe263'
+ rootfs_path_xz = self.fetch_asset(rootfs_url, asset_hash=rootfs_hash)
+
+ rootfs_path = os.path.join(self.workdir, 'rootfs.riscv32')
+ archive.lzma_uncompress(rootfs_path_xz, rootfs_path)
+
+ self.vm.set_console()
+ kernel_command_line = 'root=/dev/vda ro console=ttyS0'
+ self.vm.add_args('-kernel', kernel_path,
+ '-append', kernel_command_line,
+ '-drive', 'file=' + rootfs_path +
+ ',format=raw,id=hd0,if=none',
+ '-device', 'virtio-blk-device,drive=hd0')
+ self.vm.launch()
+
+ console_pattern = 'Welcome to Buildroot'
+ self.wait_for_console_pattern(console_pattern)
+ exec_command(self, 'root')
+ time.sleep(0.1)
+ exec_command_and_wait_for_pattern(self, 'cat /proc/cpuinfo', 'rv32i')
--
2.25.1
- [PATCH v5 0/7] target/riscv: Expose RV32 cpu to RV64 QEMU, LIU Zhiwei, 2024/07/09
- [PATCH v5 1/7] target/riscv: Add fw_dynamic_info32 for booting RV32 OpenSBI, LIU Zhiwei, 2024/07/09
- [PATCH v5 2/7] target/riscv: Adjust PMP size for no-MMU RV64 QEMU running RV32, LIU Zhiwei, 2024/07/09
- [PATCH v5 3/7] target/riscv: Correct SXL return value for RV32 in RV64 QEMU, LIU Zhiwei, 2024/07/09
- [PATCH v5 4/7] target/riscv: Detect sxl to set bit width for RV32 in RV64, LIU Zhiwei, 2024/07/09
- [PATCH v5 5/7] target/riscv: Correct mcause/scause bit width for RV32 in RV64 QEMU, LIU Zhiwei, 2024/07/09
- [PATCH v5 6/7] target/riscv: Enable RV32 CPU support in RV64 QEMU, LIU Zhiwei, 2024/07/09
- [PATCH v5 7/7] tests/avocado: Add an avocado test for riscv64,
LIU Zhiwei <=
- Re: [PATCH v5 0/7] target/riscv: Expose RV32 cpu to RV64 QEMU, Alistair Francis, 2024/07/11
- Re: [PATCH v5 0/7] target/riscv: Expose RV32 cpu to RV64 QEMU, Daniel Henrique Barboza, 2024/07/12