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[PATCH v4 1/9] hw/riscv/virt-acpi-build.c: Add namespace devices for PLI
From: |
Sunil V L |
Subject: |
[PATCH v4 1/9] hw/riscv/virt-acpi-build.c: Add namespace devices for PLIC and APLIC |
Date: |
Tue, 16 Jul 2024 20:12:58 +0530 |
As per the requirement ACPI_080 in the RISC-V Boot and Runtime Services
(BRS) specification [1], PLIC and APLIC should be in namespace as well.
So, add them using the defined HID.
[1] -
https://github.com/riscv-non-isa/riscv-brs/releases/download/v0.0.2/riscv-brs-spec.pdf
(Chapter 6)
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Acked-by: Igor Mammedov <imammedo@redhat.com>
---
hw/riscv/virt-acpi-build.c | 32 ++++++++++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c
index 0925528160..5f5082a35b 100644
--- a/hw/riscv/virt-acpi-build.c
+++ b/hw/riscv/virt-acpi-build.c
@@ -141,6 +141,30 @@ static void acpi_dsdt_add_cpus(Aml *scope, RISCVVirtState
*s)
}
}
+static void acpi_dsdt_add_plic_aplic(Aml *scope, uint8_t socket_count,
+ uint64_t mmio_base, uint64_t mmio_size,
+ const char *hid)
+{
+ uint64_t plic_aplic_addr;
+ uint32_t gsi_base;
+ uint8_t socket;
+
+ for (socket = 0; socket < socket_count; socket++) {
+ plic_aplic_addr = mmio_base + mmio_size * socket;
+ gsi_base = VIRT_IRQCHIP_NUM_SOURCES * socket;
+ Aml *dev = aml_device("IC%.02X", socket);
+ aml_append(dev, aml_name_decl("_HID", aml_string("%s", hid)));
+ aml_append(dev, aml_name_decl("_UID", aml_int(socket)));
+ aml_append(dev, aml_name_decl("_GSB", aml_int(gsi_base)));
+
+ Aml *crs = aml_resource_template();
+ aml_append(crs, aml_memory32_fixed(plic_aplic_addr, mmio_size,
+ AML_READ_WRITE));
+ aml_append(dev, aml_name_decl("_CRS", crs));
+ aml_append(scope, dev);
+ }
+}
+
static void
acpi_dsdt_add_uart(Aml *scope, const MemMapEntry *uart_memmap,
uint32_t uart_irq)
@@ -411,6 +435,14 @@ static void build_dsdt(GArray *table_data,
socket_count = riscv_socket_count(ms);
+ if (s->aia_type == VIRT_AIA_TYPE_NONE) {
+ acpi_dsdt_add_plic_aplic(scope, socket_count, memmap[VIRT_PLIC].base,
+ memmap[VIRT_PLIC].size, "RSCV0001");
+ } else {
+ acpi_dsdt_add_plic_aplic(scope, socket_count,
memmap[VIRT_APLIC_S].base,
+ memmap[VIRT_APLIC_S].size, "RSCV0002");
+ }
+
acpi_dsdt_add_uart(scope, &memmap[VIRT_UART0], UART0_IRQ);
if (socket_count == 1) {
--
2.43.0
- [PATCH v4 0/9] RISC-V: ACPI: Namespace updates, Sunil V L, 2024/07/16
- [PATCH v4 1/9] hw/riscv/virt-acpi-build.c: Add namespace devices for PLIC and APLIC,
Sunil V L <=
- [PATCH v4 2/9] hw/riscv/virt-acpi-build.c: Update the HID of RISC-V UART, Sunil V L, 2024/07/16
- [PATCH v4 3/9] tests/acpi: Allow DSDT acpi table changes for aarch64, Sunil V L, 2024/07/16
- [PATCH v4 4/9] acpi/gpex: Create PCI link devices outside PCI root bridge, Sunil V L, 2024/07/16
- [PATCH v4 6/9] tests/qtest/bios-tables-test.c: Remove the fall back path, Sunil V L, 2024/07/16
- [PATCH v4 7/9] tests/acpi: Add empty ACPI data files for RISC-V, Sunil V L, 2024/07/16
- [PATCH v4 8/9] tests/qtest/bios-tables-test.c: Enable basic testing for RISC-V, Sunil V L, 2024/07/16
- [PATCH v4 5/9] tests/acpi: update expected DSDT blob for aarch64 and microvm, Sunil V L, 2024/07/16
- [PATCH v4 9/9] tests/acpi: Add expected ACPI AML files for RISC-V, Sunil V L, 2024/07/16