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[PATCH v3 02/19] ppc/pnv: Add pointer from PnvCPUState to PnvCore
From: |
Nicholas Piggin |
Subject: |
[PATCH v3 02/19] ppc/pnv: Add pointer from PnvCPUState to PnvCore |
Date: |
Wed, 17 Jul 2024 02:25:58 +1000 |
This helps move core state from CPU to core structures.
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
include/hw/ppc/pnv_core.h | 1 +
hw/ppc/pnv_core.c | 3 +++
2 files changed, 4 insertions(+)
diff --git a/include/hw/ppc/pnv_core.h b/include/hw/ppc/pnv_core.h
index c6d62fd145..29cab9dfd9 100644
--- a/include/hw/ppc/pnv_core.h
+++ b/include/hw/ppc/pnv_core.h
@@ -54,6 +54,7 @@ struct PnvCoreClass {
#define PNV_CORE_TYPE_NAME(cpu_model) cpu_model PNV_CORE_TYPE_SUFFIX
typedef struct PnvCPUState {
+ PnvCore *pnv_core;
Object *intc;
} PnvCPUState;
diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c
index f40ab721d6..2da271ffb6 100644
--- a/hw/ppc/pnv_core.c
+++ b/hw/ppc/pnv_core.c
@@ -278,6 +278,7 @@ static void pnv_core_realize(DeviceState *dev, Error **errp)
pc->threads = g_new(PowerPCCPU *, cc->nr_threads);
for (i = 0; i < cc->nr_threads; i++) {
PowerPCCPU *cpu;
+ PnvCPUState *pnv_cpu;
obj = object_new(typename);
cpu = POWERPC_CPU(obj);
@@ -288,6 +289,8 @@ static void pnv_core_realize(DeviceState *dev, Error **errp)
object_property_add_child(OBJECT(pc), name, obj);
cpu->machine_data = g_new0(PnvCPUState, 1);
+ pnv_cpu = pnv_cpu_state(cpu);
+ pnv_cpu->pnv_core = pc;
object_unref(obj);
}
--
2.45.1
- [PATCH v3 00/19] ppc/pnv: Better big-core model, lpar-per-core, PC unit, Nicholas Piggin, 2024/07/16
- [PATCH v3 01/19] target/ppc: Fix msgsnd for POWER8, Nicholas Piggin, 2024/07/16
- [PATCH v3 03/19] ppc/pnv: Move timebase state into PnvCore, Nicholas Piggin, 2024/07/16
- [PATCH v3 05/19] ppc/pnv: use class attribute to limit SMT threads for different machines, Nicholas Piggin, 2024/07/16
- [PATCH v3 02/19] ppc/pnv: Add pointer from PnvCPUState to PnvCore,
Nicholas Piggin <=
- [PATCH v3 12/19] ppc/pnv: Implement big-core PVR for Power9/10, Nicholas Piggin, 2024/07/16
- [PATCH v3 04/19] target/ppc: Move SPR indirect registers into PnvCore, Nicholas Piggin, 2024/07/16
- [PATCH v3 08/19] target/ppc: Add helpers to check for SMT sibling threads, Nicholas Piggin, 2024/07/16
- [PATCH v3 13/19] ppc/pnv: Implement Power9 CPU core thread state indirect register, Nicholas Piggin, 2024/07/16
- [PATCH v3 10/19] ppc/pnv: Add a big-core mode that joins two regular cores, Nicholas Piggin, 2024/07/16
- [PATCH v3 14/19] ppc/pnv: Add POWER10 ChipTOD quirk for big-core, Nicholas Piggin, 2024/07/16
- [PATCH v3 15/19] ppc/pnv: Add big-core machine property, Nicholas Piggin, 2024/07/16