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[PULL 12/15] aspeed/soc: support ADC for AST2700
From: |
Cédric Le Goater |
Subject: |
[PULL 12/15] aspeed/soc: support ADC for AST2700 |
Date: |
Sun, 21 Jul 2024 10:13:58 +0200 |
From: Jamin Lin <jamin_lin@aspeedtech.com>
Add ADC model for AST2700 ADC support.
The ADC controller registers base address is start at
0x14C0_0000 and its address space is 0x1000.
The ADC controller interrupt is connected to
GICINT130_INTC group at bit 16. The GIC IRQ is 130.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
---
hw/arm/aspeed_ast27x0.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c
index a9fb0d4b8874..4257b5e8af82 100644
--- a/hw/arm/aspeed_ast27x0.c
+++ b/hw/arm/aspeed_ast27x0.c
@@ -60,6 +60,7 @@ static const hwaddr aspeed_soc_ast2700_memmap[] = {
[ASPEED_DEV_SLIIO] = 0x14C1E000,
[ASPEED_GIC_DIST] = 0x12200000,
[ASPEED_GIC_REDIST] = 0x12280000,
+ [ASPEED_DEV_ADC] = 0x14C00000,
};
#define AST2700_MAX_IRQ 288
@@ -344,6 +345,9 @@ static void aspeed_soc_ast2700_init(Object *obj)
object_initialize_child(obj, "sli", &s->sli, TYPE_ASPEED_2700_SLI);
object_initialize_child(obj, "sliio", &s->sliio, TYPE_ASPEED_2700_SLIIO);
object_initialize_child(obj, "intc", &a->intc, TYPE_ASPEED_2700_INTC);
+
+ snprintf(typename, sizeof(typename), "aspeed.adc-%s", socname);
+ object_initialize_child(obj, "adc", &s->adc, typename);
}
/*
@@ -601,6 +605,14 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev,
Error **errp)
aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->sliio), 0,
sc->memmap[ASPEED_DEV_SLIIO]);
+ /* ADC */
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->adc), errp)) {
+ return;
+ }
+ aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->adc), 0, sc->memmap[ASPEED_DEV_ADC]);
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->adc), 0,
+ aspeed_soc_get_irq(s, ASPEED_DEV_ADC));
+
create_unimplemented_device("ast2700.dpmcu", 0x11000000, 0x40000);
create_unimplemented_device("ast2700.iomem0", 0x12000000, 0x01000000);
create_unimplemented_device("ast2700.iomem1", 0x14000000, 0x01000000);
--
2.45.2
- [PULL 06/15] aspeed: Tune eMMC device properties to reflect HW strapping, (continued)
- [PULL 06/15] aspeed: Tune eMMC device properties to reflect HW strapping, Cédric Le Goater, 2024/07/21
- [PULL 03/15] aspeed: Load eMMC first boot area as a boot rom, Cédric Le Goater, 2024/07/21
- [PULL 01/15] aspeed/smc: Fix possible integer overflow, Cédric Le Goater, 2024/07/21
- [PULL 04/15] aspeed/scu: Add boot-from-eMMC HW strapping bit for AST2600 SoC, Cédric Le Goater, 2024/07/21
- [PULL 05/15] aspeed: Introduce a AspeedSoCClass 'boot_from_emmc' handler, Cédric Le Goater, 2024/07/21
- [PULL 07/15] aspeed: Add boot-from-eMMC HW strapping bit to rainier-bmc machine, Cédric Le Goater, 2024/07/21
- [PULL 09/15] aspeed: Introduce a 'boot-emmc' machine option, Cédric Le Goater, 2024/07/21
- [PULL 08/15] aspeed: Introduce a 'hw_strap1' machine attribute, Cédric Le Goater, 2024/07/21
- [PULL 11/15] aspeed/adc: Add AST2700 support, Cédric Le Goater, 2024/07/21
- [PULL 10/15] tests/avocado/machine_aspeed.py: Add eMMC boot tests, Cédric Le Goater, 2024/07/21
- [PULL 12/15] aspeed/soc: support ADC for AST2700,
Cédric Le Goater <=
- [PULL 15/15] aspeed: fix coding style, Cédric Le Goater, 2024/07/21
- [PULL 14/15] hw/i2c/aspeed: rename the I2C class pool attribute to share_pool, Cédric Le Goater, 2024/07/21
- [PULL 13/15] hw/i2c/aspeed: support to set the different memory size, Cédric Le Goater, 2024/07/21
- Re: [PULL 00/15] aspeed queue, Richard Henderson, 2024/07/22