[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL v2 35/61] docs: Document composable SR-IOV device
From: |
Michael S. Tsirkin |
Subject: |
[PULL v2 35/61] docs: Document composable SR-IOV device |
Date: |
Tue, 23 Jul 2024 06:58:24 -0400 |
From: Akihiko Odaki <akihiko.odaki@daynix.com>
Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Message-Id: <20240715-sriov-v5-8-3f5539093ffc@daynix.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
MAINTAINERS | 1 +
docs/system/index.rst | 1 +
docs/system/sriov.rst | 36 ++++++++++++++++++++++++++++++++++++
3 files changed, 38 insertions(+)
create mode 100644 docs/system/sriov.rst
diff --git a/MAINTAINERS b/MAINTAINERS
index 8ad64ff76b..93546cfb14 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2010,6 +2010,7 @@ F: hw/pci-bridge/*
F: qapi/pci.json
F: docs/pci*
F: docs/specs/*pci*
+F: docs/system/sriov.rst
PCIE DOE
M: Huai-Cheng Kuo <hchkuo@avery-design.com.tw>
diff --git a/docs/system/index.rst b/docs/system/index.rst
index c21065e519..718e9d3c56 100644
--- a/docs/system/index.rst
+++ b/docs/system/index.rst
@@ -39,3 +39,4 @@ or Hypervisor.Framework.
multi-process
confidential-guest-support
vm-templating
+ sriov
diff --git a/docs/system/sriov.rst b/docs/system/sriov.rst
new file mode 100644
index 0000000000..a851a66a4b
--- /dev/null
+++ b/docs/system/sriov.rst
@@ -0,0 +1,36 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later
+
+Compsable SR-IOV device
+=======================
+
+SR-IOV (Single Root I/O Virtualization) is an optional extended capability of a
+PCI Express device. It allows a single physical function (PF) to appear as
+multiple virtual functions (VFs) for the main purpose of eliminating software
+overhead in I/O from virtual machines.
+
+There are devices with predefined SR-IOV configurations, but it is also
possible
+to compose an SR-IOV device yourself. Composing an SR-IOV device is currently
+only supported by virtio-net-pci.
+
+Users can configure an SR-IOV-capable virtio-net device by adding
+virtio-net-pci functions to a bus. Below is a command line example:
+
+.. code-block:: shell
+
+ -netdev user,id=n -netdev user,id=o
+ -netdev user,id=p -netdev user,id=q
+ -device pcie-root-port,id=b
+ -device virtio-net-pci,bus=b,addr=0x0.0x3,netdev=q,sriov-pf=f
+ -device virtio-net-pci,bus=b,addr=0x0.0x2,netdev=p,sriov-pf=f
+ -device virtio-net-pci,bus=b,addr=0x0.0x1,netdev=o,sriov-pf=f
+ -device virtio-net-pci,bus=b,addr=0x0.0x0,netdev=n,id=f
+
+The VFs specify the paired PF with ``sriov-pf`` property. The PF must be
+added after all VFs. It is the user's responsibility to ensure that VFs have
+function numbers larger than one of the PF, and that the function numbers
+have a consistent stride.
+
+You may also need to perform additional steps to activate the SR-IOV feature on
+your guest. For Linux, refer to [1]_.
+
+.. [1] https://docs.kernel.org/PCI/pci-iov-howto.html
--
MST
- [PULL v2 27/61] virtio: Add VIRTIO_F_IN_ORDER property definition, (continued)
- [PULL v2 27/61] virtio: Add VIRTIO_F_IN_ORDER property definition, Michael S. Tsirkin, 2024/07/23
- [PULL v2 28/61] contrib/vhost-user-blk: fix overflowing expression, Michael S. Tsirkin, 2024/07/23
- [PULL v2 29/61] hw/pci: Fix SR-IOV VF number calculation, Michael S. Tsirkin, 2024/07/23
- [PULL v2 30/61] pcie_sriov: Ensure PF and VF are mutually exclusive, Michael S. Tsirkin, 2024/07/23
- [PULL v2 31/61] pcie_sriov: Check PCI Express for SR-IOV PF, Michael S. Tsirkin, 2024/07/23
- [PULL v2 33/61] virtio-pci: Implement SR-IOV PF, Michael S. Tsirkin, 2024/07/23
- [PULL v2 32/61] pcie_sriov: Allow user to create SR-IOV device, Michael S. Tsirkin, 2024/07/23
- [PULL v2 34/61] virtio-net: Implement SR-IOV VF, Michael S. Tsirkin, 2024/07/23
- [PULL v2 35/61] docs: Document composable SR-IOV device,
Michael S. Tsirkin <=
- [PULL v2 36/61] smbios: make memory device size configurable per Machine, Michael S. Tsirkin, 2024/07/23
- [PULL v2 37/61] accel/kvm: Extract common KVM vCPU {creation,parking} code, Michael S. Tsirkin, 2024/07/23
[PULL v2 38/61] hw/acpi: Move CPU ctrl-dev MMIO region len macro to common header file, Michael S. Tsirkin, 2024/07/23
[PULL v2 39/61] hw/acpi: Update ACPI GED framework to support vCPU Hotplug, Michael S. Tsirkin, 2024/07/23
[PULL v2 40/61] hw/acpi: Update GED _EVT method AML with CPU scan, Michael S. Tsirkin, 2024/07/23
[PULL v2 41/61] hw/acpi: Update CPUs AML with cpu-(ctrl)dev change, Michael S. Tsirkin, 2024/07/23