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[PULL v2 53/61] acpi/gpex: Create PCI link devices outside PCI root brid
From: |
Michael S. Tsirkin |
Subject: |
[PULL v2 53/61] acpi/gpex: Create PCI link devices outside PCI root bridge |
Date: |
Tue, 23 Jul 2024 07:00:36 -0400 |
From: Sunil V L <sunilvl@ventanamicro.com>
Currently, PCI link devices (PNP0C0F) are always created within the
scope of the PCI root bridge. However, RISC-V needs these link devices
to be created outside to ensure the probing order in the OS. This
matches the example given in the ACPI specification [1] as well. Hence,
create these link devices directly under _SB instead of under the PCI
root bridge.
To keep these link device names unique for multiple PCI bridges, change
the device name from GSIx to LXXY format where XX is the PCI bus number
and Y is the INTx.
GPEX is currently used by riscv, aarch64/virt and x86/microvm machines.
So, this change will alter the DSDT for those systems.
[1] - ACPI 5.1: 6.2.13.1 Example: Using _PRT to Describe PCI IRQ Routing
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Acked-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20240716144306.2432257-5-sunilvl@ventanamicro.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
hw/pci-host/gpex-acpi.c | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
index f69413ea2c..391fabb8a8 100644
--- a/hw/pci-host/gpex-acpi.c
+++ b/hw/pci-host/gpex-acpi.c
@@ -7,7 +7,8 @@
#include "hw/pci/pcie_host.h"
#include "hw/acpi/cxl.h"
-static void acpi_dsdt_add_pci_route_table(Aml *dev, uint32_t irq)
+static void acpi_dsdt_add_pci_route_table(Aml *dev, uint32_t irq,
+ Aml *scope, uint8_t bus_num)
{
Aml *method, *crs;
int i, slot_no;
@@ -20,7 +21,7 @@ static void acpi_dsdt_add_pci_route_table(Aml *dev, uint32_t
irq)
Aml *pkg = aml_package(4);
aml_append(pkg, aml_int((slot_no << 16) | 0xFFFF));
aml_append(pkg, aml_int(i));
- aml_append(pkg, aml_name("GSI%d", gsi));
+ aml_append(pkg, aml_name("L%.02X%X", bus_num, gsi));
aml_append(pkg, aml_int(0));
aml_append(rt_pkg, pkg);
}
@@ -30,7 +31,7 @@ static void acpi_dsdt_add_pci_route_table(Aml *dev, uint32_t
irq)
/* Create GSI link device */
for (i = 0; i < PCI_NUM_PINS; i++) {
uint32_t irqs = irq + i;
- Aml *dev_gsi = aml_device("GSI%d", i);
+ Aml *dev_gsi = aml_device("L%.02X%X", bus_num, i);
aml_append(dev_gsi, aml_name_decl("_HID", aml_string("PNP0C0F")));
aml_append(dev_gsi, aml_name_decl("_UID", aml_int(i)));
crs = aml_resource_template();
@@ -45,7 +46,7 @@ static void acpi_dsdt_add_pci_route_table(Aml *dev, uint32_t
irq)
aml_append(dev_gsi, aml_name_decl("_CRS", crs));
method = aml_method("_SRS", 1, AML_NOTSERIALIZED);
aml_append(dev_gsi, method);
- aml_append(dev, dev_gsi);
+ aml_append(scope, dev_gsi);
}
}
@@ -174,7 +175,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
aml_append(dev, aml_name_decl("_PXM", aml_int(numa_node)));
}
- acpi_dsdt_add_pci_route_table(dev, cfg->irq);
+ acpi_dsdt_add_pci_route_table(dev, cfg->irq, scope, bus_num);
/*
* Resources defined for PXBs are composed of the following parts:
@@ -205,7 +206,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
aml_append(dev, aml_name_decl("_STR", aml_unicode("PCIe 0 Device")));
aml_append(dev, aml_name_decl("_CCA", aml_int(1)));
- acpi_dsdt_add_pci_route_table(dev, cfg->irq);
+ acpi_dsdt_add_pci_route_table(dev, cfg->irq, scope, 0);
method = aml_method("_CBA", 0, AML_NOTSERIALIZED);
aml_append(method, aml_return(aml_int(cfg->ecam.base)));
--
MST
- [PULL v2 42/61] physmem: Add helper function to destroy CPU AddressSpace, (continued)
- [PULL v2 42/61] physmem: Add helper function to destroy CPU AddressSpace, Michael S. Tsirkin, 2024/07/23
- [PULL v2 43/61] gdbstub: Add helper function to unregister GDB register space, Michael S. Tsirkin, 2024/07/23
- [PULL v2 45/61] virtio-iommu: Remove probe_done, Michael S. Tsirkin, 2024/07/23
- [PULL v2 44/61] Revert "virtio-iommu: Clear IOMMUDevice when VFIO device is unplugged", Michael S. Tsirkin, 2024/07/23
- [PULL v2 46/61] virtio-iommu: Free [host_]resv_ranges on unset_iommu_devices, Michael S. Tsirkin, 2024/07/23
- [PULL v2 50/61] hw/riscv/virt-acpi-build.c: Add namespace devices for PLIC and APLIC, Michael S. Tsirkin, 2024/07/23
- [PULL v2 47/61] virtio-iommu: Remove the end point on detach, Michael S. Tsirkin, 2024/07/23
- [PULL v2 48/61] hw/vfio/common: Add vfio_listener_region_del_iommu trace event, Michael S. Tsirkin, 2024/07/23
- [PULL v2 49/61] virtio-iommu: Add trace point on virtio_iommu_detach_endpoint_from_domain, Michael S. Tsirkin, 2024/07/23
- [PULL v2 51/61] hw/riscv/virt-acpi-build.c: Update the HID of RISC-V UART, Michael S. Tsirkin, 2024/07/23
- [PULL v2 53/61] acpi/gpex: Create PCI link devices outside PCI root bridge,
Michael S. Tsirkin <=
- [PULL v2 52/61] tests/acpi: Allow DSDT acpi table changes for aarch64, Michael S. Tsirkin, 2024/07/23
- [PULL v2 54/61] tests/acpi: update expected DSDT blob for aarch64 and microvm, Michael S. Tsirkin, 2024/07/23
- [PULL v2 55/61] tests/qtest/bios-tables-test.c: Remove the fall back path, Michael S. Tsirkin, 2024/07/23
- [PULL v2 56/61] tests/acpi: Add empty ACPI data files for RISC-V, Michael S. Tsirkin, 2024/07/23
- [PULL v2 57/61] tests/qtest/bios-tables-test.c: Enable basic testing for RISC-V, Michael S. Tsirkin, 2024/07/23
- [PULL v2 58/61] tests/acpi: Add expected ACPI AML files for RISC-V, Michael S. Tsirkin, 2024/07/23
- [PULL v2 59/61] hw/pci: Add all Data Object Types defined in PCIe r6.0, Michael S. Tsirkin, 2024/07/23
- [PULL v2 60/61] backends: Initial support for SPDM socket support, Michael S. Tsirkin, 2024/07/23
- [PULL v2 61/61] hw/nvme: Add SPDM over DOE support, Michael S. Tsirkin, 2024/07/23
- Re: [PULL v2 00/61] virtio,pci,pc: features,fixes, Richard Henderson, 2024/07/23