qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH] target/ppc: Set ctx->opcode for decode_insn32()


From: Philippe Mathieu-Daudé
Subject: Re: [PATCH] target/ppc: Set ctx->opcode for decode_insn32()
Date: Wed, 31 Jul 2024 14:47:33 +0200
User-agent: Mozilla Thunderbird

On 31/7/24 12:07, Ilya Leoshkevich wrote:
divdu (without a dot) sometimes updates cr0, even though it shouldn't.
The reason is that gen_op_arith_divd() checks Rc(ctx->opcode), which is
not initialized. This field is initialized only for instructions that
go through decode_legacy(), and not decodetree.

There already was a similar issue fixed in commit 86e6202a57b1
("target/ppc: Make divw[u] handler method decodetree compatible.").

It's not immediately clear what else may access the uninitialized
ctx->opcode, so instead of playing whack-a-mole and changing the check
to compute_rc0, simply initialize ctx->opcode.

Cc: qemu-stable@nongnu.org
Fixes: 99082815f17f ("target/ppc: Add infrastructure for prefixed insns")
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
---
  target/ppc/translate.c | 3 +--
  1 file changed, 1 insertion(+), 2 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>




reply via email to

[Prev in Thread] Current Thread [Next in Thread]