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Re: [PATCH v2 0/3] MIPS misc patches
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From: |
Philippe Mathieu-Daudé |
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Subject: |
Re: [PATCH v2 0/3] MIPS misc patches |
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Date: |
Thu, 15 Aug 2024 11:21:35 +0200 |
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User-agent: |
Mozilla Thunderbird |
On 21/6/24 15:11, Jiaxun Yang wrote:
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
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Changes in v2:
- v1 was sent in mistake, b4 messed up with QEMU again
- Link to v1:
https://lore.kernel.org/r/20240621-loongson3-ipi-follow-v1-0-c6e73f2b2844@flygoat.com
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Jiaxun Yang (3):
hw/mips/loongson3_virt: Store core_iocsr into LoongsonMachineState
hw/mips/loongson3_virt: Fix condition of IPI IOCSR connection
Patches 1 & 2 queued,
linux-user/mips64: Use MIPS64R2-generic as default CPU type
patch 3 superseded by
20240814133928.6746-4-philmd@linaro.org/">https://lore.kernel.org/qemu-devel/20240814133928.6746-4-philmd@linaro.org/
Thanks.