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[PATCH v2 5/5] hw/sensor/tmp105: Lower 4 bit of limit registers are alwa
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH v2 5/5] hw/sensor/tmp105: Lower 4 bit of limit registers are always 0 |
Date: |
Fri, 6 Sep 2024 17:49:11 +0200 |
From: Guenter Roeck <linux@roeck-us.net>
Per datasheet, "HIGH AND LOW LIMIT REGISTERS", the lower 4 bit
of the limit registers are unused and always report 0.
The lower 4 bit should not be used for temperature comparisons,
so mask the unused bits before storing the limits.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/sensor/tmp105.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/sensor/tmp105.c b/hw/sensor/tmp105.c
index f5101af919..9d7b911f59 100644
--- a/hw/sensor/tmp105.c
+++ b/hw/sensor/tmp105.c
@@ -171,7 +171,7 @@ static void tmp105_write(TMP105State *s)
case TMP105_REG_T_HIGH:
if (s->len >= 3) {
s->limit[s->pointer & 1] = (int16_t)
- ((((uint16_t) s->buf[0]) << 8) | s->buf[1]);
+ ((((uint16_t) s->buf[0]) << 8) | (s->buf[1] & 0xf0));
}
tmp105_alarm_update(s, false);
break;
--
2.45.2
- [PATCH v2 0/5] tmp105: Improvements and fixes, Philippe Mathieu-Daudé, 2024/09/06
- [PATCH v2 1/5] hw/sensor/tmp105: Coding style fixes, Philippe Mathieu-Daudé, 2024/09/06
- [PATCH v2 2/5] hw/sensor/tmp105: Use registerfields API, Philippe Mathieu-Daudé, 2024/09/06
- [PATCH v2 3/5] hw/sensor/tmp105: Pass 'oneshot' argument to tmp105_alarm_update(), Philippe Mathieu-Daudé, 2024/09/06
- [PATCH v2 4/5] hw/sensor/tmp105: OS (one-shot) bit in config register always returns 0, Philippe Mathieu-Daudé, 2024/09/06
- [PATCH v2 5/5] hw/sensor/tmp105: Lower 4 bit of limit registers are always 0,
Philippe Mathieu-Daudé <=
- Re: [PATCH v2 0/5] tmp105: Improvements and fixes, Philippe Mathieu-Daudé, 2024/09/09
- Re: [PATCH v2 0/5] tmp105: Improvements and fixes, Philippe Mathieu-Daudé, 2024/09/12