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Re: [PATCH v2 09/12] target/arm: Implement the SETG* instructions
From: |
Philippe Mathieu-Daudé |
Subject: |
Re: [PATCH v2 09/12] target/arm: Implement the SETG* instructions |
Date: |
Tue, 24 Sep 2024 21:14:55 +0200 |
User-agent: |
Mozilla Thunderbird |
Hi Peter,
(patch merged as commit 6087df574400659226861fa5ba47970f1fbd277b).
On 12/9/23 16:04, Peter Maydell wrote:
The FEAT_MOPS SETG* instructions are very similar to the SET*
instructions, but as well as setting memory contents they also
set the MTE tags. They are architecturally required to operate
on tag-granule aligned regions only.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
v2: - separate helper functions calling do_setp/setm/sete
- use cpu_st16_mmu()
So you replaced the pair of cpu_stq_mmuidx_ra() from v1 by
cpu_st16_mmu().
---
target/arm/internals.h | 10 ++++
target/arm/tcg/helper-a64.h | 3 ++
target/arm/tcg/a64.decode | 5 ++
target/arm/tcg/helper-a64.c | 86 ++++++++++++++++++++++++++++++++--
target/arm/tcg/mte_helper.c | 40 ++++++++++++++++
target/arm/tcg/translate-a64.c | 20 +++++---
6 files changed, 155 insertions(+), 9 deletions(-)
+/*
+ * Similar, but setting tags. The architecture requires us to do this
+ * in 16-byte chunks. SETP accesses are not tag checked; they set
+ * the tags.
+ */
+static uint64_t set_step_tags(CPUARMState *env, uint64_t toaddr,
+ uint64_t setsize, uint32_t data, int memidx,
+ uint32_t *mtedesc, uintptr_t ra)
+{
+ void *mem;
+ uint64_t cleanaddr;
+
+ setsize = MIN(setsize, page_limit(toaddr));
+
+ cleanaddr = useronly_clean_ptr(toaddr);
+ /*
+ * Trapless lookup: returns NULL for invalid page, I/O,
+ * watchpoints, clean pages, etc.
+ */
+ mem = tlb_vaddr_to_host(env, cleanaddr, MMU_DATA_STORE, memidx);
+
+#ifndef CONFIG_USER_ONLY
+ if (unlikely(!mem)) {
+ /*
+ * Slow-path: just do one write. This will handle the
+ * watchpoint, invalid page, etc handling correctly.
+ * The architecture requires that we do 16 bytes at a time,
+ * and we know both ptr and size are 16 byte aligned.
+ * For clean code pages, the next iteration will see
+ * the page dirty and will use the fast path.
+ */
+ uint64_t repldata = data * 0x0101010101010101ULL;
+ MemOpIdx oi16 = make_memop_idx(MO_TE | MO_128, memidx);
I'm trying to understand the MO_TE use, but I'm not seeing it in
https://developer.arm.com/documentation/ddi0602/2024-06/Base-Instructions/SETGP--SETGM--SETGE--Memory-set-with-tag-setting-
pseudo code. I also checked
https://developer.arm.com/documentation/ddi0602/2024-06/Shared-Pseudocode/aarch64-functions-mops?lang=en#impl-aarch64.MemSetBytes.4
and
https://developer.arm.com/documentation/ddi0602/2024-06/Shared-Pseudocode/aarch64-functions-memory?lang=en#AArch64.MemSingleWrite.5
Is the following part in MemSingleWrite()?
if !atomic && aligned && accdesc.ispair then
bits(halfsize*8) lowhalf, highhalf;
<highhalf, lowhalf> = value;
memstatus = PhysMemWrite(memaddrdesc, halfsize, accdesc, lowhalf);
memaddrdesc.paddress.address = memaddrdesc.paddress.address +
halfsize;
memstatus = PhysMemWrite(memaddrdesc, halfsize, accdesc, highhalf);
+ cpu_st16_mmu(env, toaddr, int128_make128(repldata, repldata), oi16,
ra);
+ mte_mops_set_tags(env, toaddr, 16, *mtedesc);
+ return 16;
+ }
+#endif
+ /* Easy case: just memset the host memory */
+ memset(mem, data, setsize);
+ mte_mops_set_tags(env, toaddr, setsize, *mtedesc);
+ return setsize;
+}
If we need to endian swap, could we use the cached hflags instead of MO_TE?
The BE_DATA bit is iset in rebuild_hflags_a64() when
arm_cpu_data_is_big_endian_a64() is true. The following diff snippet
works for me but I'm out of my comfort zone here :)
-- >8 --
uint64_t repldata = data * 0x0101010101010101ULL;
- MemOpIdx oi16 = make_memop_idx(MO_TE | MO_128, memidx);
+ MemOp be_data = EX_TBFLAG_ANY(env->hflags, BE_DATA) ? MO_BE :
MO_LE;
+ MemOpIdx oi16 = make_memop_idx(be_data | MO_128, memidx);
cpu_st16_mmu(env, toaddr, int128_make128(repldata, repldata),
oi16, ra);
mte_mops_set_tags(env, toaddr, 16, *mtedesc);
return 16;
---
Thanks,
Phil.
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