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[PATCH v15 09/21] target/riscv: Expose zicfilp extension as a cpu proper
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From: |
Deepak Gupta |
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Subject: |
[PATCH v15 09/21] target/riscv: Expose zicfilp extension as a cpu property |
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Date: |
Thu, 3 Oct 2024 11:33:30 -0700 |
Signed-off-by: Deepak Gupta <debug@rivosinc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
target/riscv/cpu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 05f727222e..135559fc95 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -1469,6 +1469,7 @@ const RISCVCPUMultiExtConfig riscv_cpu_extensions[] = {
MULTI_EXT_CFG_BOOL("sscofpmf", ext_sscofpmf, false),
MULTI_EXT_CFG_BOOL("smcntrpmf", ext_smcntrpmf, false),
MULTI_EXT_CFG_BOOL("zifencei", ext_zifencei, true),
+ MULTI_EXT_CFG_BOOL("zicfilp", ext_zicfilp, false),
MULTI_EXT_CFG_BOOL("zicsr", ext_zicsr, true),
MULTI_EXT_CFG_BOOL("zihintntl", ext_zihintntl, true),
MULTI_EXT_CFG_BOOL("zihintpause", ext_zihintpause, true),
--
2.45.0
- [PATCH v15 00/21] riscv support for control flow integrity extensions, Deepak Gupta, 2024/10/03
- [PATCH v15 01/21] target/riscv: expose *envcfg csr and priv to qemu-user as well, Deepak Gupta, 2024/10/03
- [PATCH v15 04/21] target/riscv: save and restore elp state on priv transitions, Deepak Gupta, 2024/10/03
- [PATCH v15 03/21] target/riscv: Introduce elp state and enabling controls for zicfilp, Deepak Gupta, 2024/10/03
- [PATCH v15 02/21] target/riscv: Add zicfilp extension, Deepak Gupta, 2024/10/03
- [PATCH v15 20/21] disas/riscv: enable disassembly for compressed sspush/sspopchk, Deepak Gupta, 2024/10/03
- [PATCH v15 09/21] target/riscv: Expose zicfilp extension as a cpu property,
Deepak Gupta <=
- [PATCH v15 05/21] target/riscv: additional code information for sw check, Deepak Gupta, 2024/10/03
- [PATCH v15 06/21] target/riscv: tracking indirect branches (fcfi) for zicfilp, Deepak Gupta, 2024/10/03
- [PATCH v15 08/21] disas/riscv: enable `lpad` disassembly, Deepak Gupta, 2024/10/03
- [PATCH v15 14/21] target/riscv: disallow probe accesses to shadow stack, Deepak Gupta, 2024/10/03
- [PATCH v15 19/21] disas/riscv: enable disassembly for zicfiss instructions, Deepak Gupta, 2024/10/03
- [PATCH v15 10/21] target/riscv: Add zicfiss extension, Deepak Gupta, 2024/10/03
- [PATCH v15 07/21] target/riscv: zicfilp `lpad` impl and branch tracking, Deepak Gupta, 2024/10/03
- [PATCH v15 15/21] target/riscv: AMO operations always raise store/AMO fault, Deepak Gupta, 2024/10/03
- [PATCH v15 21/21] target/riscv: Expose zicfiss extension as a cpu property, Deepak Gupta, 2024/10/03