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RE: [PATCH v2 0/3] Introduce a new Write Protected pin inverted property


From: Jamin Lin
Subject: RE: [PATCH v2 0/3] Introduce a new Write Protected pin inverted property
Date: Thu, 14 Nov 2024 08:45:56 +0000

Hi Cedric,

> 
> Hello Jamin,
> 
> On 11/14/24 06:32, Jamin Lin wrote:
> > Hi Cedric, Andrew
> >
> >> Subject: [PATCH v2 0/3] Introduce a new Write Protected pin inverted
> >> property
> >>
> >> change from v1:
> >> 1. Support RTC for AST2700.
> >> 2. Support SDHCI write protected pin inverted for AST2500 and AST2600.
> >> 3. Introduce Capabilities Register 2 for SD slot 0 and 1.
> >> 4. Support create flash devices via command line for AST1030.
> >>
> >> change from v2:
> >> replace wp-invert with wp-inverted and fix review issues.
> >>
> >> Jamin Lin (3):
> >>    hw/sd/sdhci: Fix coding style
> >>    hw/sd/sdhci: Introduce a new Write Protected pin inverted property
> >>    hw/arm/aspeed: Invert sdhci write protected pin for AST2600 and
> >>      AST2500 EVBs
> >>
> >>   hw/arm/aspeed.c         |  8 +++++
> >>   hw/sd/sdhci.c           | 70
> ++++++++++++++++++++++++++++-------------
> >>   include/hw/arm/aspeed.h |  1 +
> >>   include/hw/sd/sdhci.h   |  5 +++
> >>   4 files changed, 62 insertions(+), 22 deletions(-)
> >>
> >
> > Could you please help to review this patch series?
> 
> We would need an Ack from the sd maintainer on patch 2. Then, I can apply on
> the aspeed queue. That's material for QEMU 10.0.
> 
Got it.
Thanks for your kindly support.
Jamin
> Thanks,
> 
> C.


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