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Re: [PATCH 01/67] target/arm: Use ### to separate 3rd-level sections in


From: Philippe Mathieu-Daudé
Subject: Re: [PATCH 01/67] target/arm: Use ### to separate 3rd-level sections in a64.decode
Date: Mon, 2 Dec 2024 15:12:42 +0100
User-agent: Mozilla Thunderbird

On 1/12/24 16:05, Richard Henderson wrote:
We already use ### for 4.1.92 Data Processing (immediate),
but not the two following two third-level sections:
4.1.93 Branches, and 4.1.94 Loads and stores.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
  target/arm/tcg/a64.decode | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index 331a8e180c..197437ba8e 100644
--- a/target/arm/tcg/a64.decode
+++ b/target/arm/tcg/a64.decode
@@ -161,7 +161,7 @@ UBFM            . 10 100110 . ...... ...... ..... ..... 
@bitfield_32
  EXTR            1 00 100111 1 0 rm:5 imm:6 rn:5 rd:5     &extract sf=1
  EXTR            0 00 100111 0 0 rm:5 0 imm:5 rn:5 rd:5   &extract sf=0
-# Branches
+### Branches
%imm26 0:s26 !function=times_4
  @branch         . ..... .......................... &i imm=%imm26
@@ -291,7 +291,7 @@ HLT             1101 0100 010 ................ 000 00 @i16
  # DCPS2         1101 0100 101 ................ 000 10 @i16
  # DCPS3         1101 0100 101 ................ 000 11 @i16
-# Loads and stores
+### Loads and stores
&stxr rn rt rt2 rs sz lasr
  &stlr           rn rt sz lasr

I'd include in this patch (from next one):

+### Data Processing (register)
+
+# Data Processing (2-source)
+# Data Processing (1-source)
+# Logical (shifted reg)
+# Add/subtract (shifted reg)
+# Add/subtract (extended reg)
+# Add/subtract (carry)
+# Rotate right into flags
+# Evaluate into flags
+# Conditional compare (regster)
+# Conditional compare (immediate)
+# Conditional select
+# Data Processing (3-source)

Because it looks (to me) out of context in in the next one.
Anyway,

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>




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