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Re: [PATCH 4/7] [BCM2835 AUX 4/7] STAT & IIR registers


From: Peter Maydell
Subject: Re: [PATCH 4/7] [BCM2835 AUX 4/7] STAT & IIR registers
Date: Mon, 2 Dec 2024 16:11:11 +0000

On Sun, 17 Nov 2024 at 23:02, Ioan-Cristian CÎRSTEA
<jean.christian.cirstea@gmail.com> wrote:
>
> This commits implements the required logic for STAT & IIR registers. The
> STAT register is an extension of the UART 16550 that provides useful
> (more helpful than the base state register) insights of the peripheral
> state. The STAT register is intrinsically related to the IIR register,
> so this commit implements the logic for both of them.
>
> Interrupt status logic has been updated accordingly.
>
> Signed-off-by: Ioan-Cristian CÎRSTEA <ioan-cristian.cirstea@tutanota.com>



>      case AUX_MU_IIR_REG:
> -        res = 0xc0; /* FIFO enables */
> -        /* The spec is unclear on what happens when both tx and rx
> -         * interrupts are active, besides that this cannot occur. At
> -         * present, we choose to prioritise the rx interrupt, since
> -         * the tx fifo is always empty. */

This explanatory comment seems to have got lost in this
refactoring.

thanks
-- PMM



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