Re: [PATCH 36/67] target/arm: Introduce gen_gvec_cls, gen_gvec_clz

[Richard Henderson]

On 12/2/24 10:29, Philippe Mathieu-Daudé wrote:
> On 1/12/24 16:05, Richard Henderson wrote:
> > Add gvec interfaces for CLS and CLZ operations.
> >
> > Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> > ---
> >   target/arm/tcg/translate.h      |  5 +++++
> >   target/arm/tcg/gengvec.c        | 35 +++++++++++++++++++++++++++++++++
> >   target/arm/tcg/translate-a64.c  | 29 +++++++--------------------
> >   target/arm/tcg/translate-neon.c | 29 ++-------------------------
> >   4 files changed, 49 insertions(+), 49 deletions(-)
>
>
> > +void gen_gvec_cls(unsigned vece, uint32_t rd_ofs, uint32_t rn_ofs,
> > +                  uint32_t opr_sz, uint32_t max_sz)
> > +{
> > +    static const GVecGen2 g[] = {
> > +        { .fni4 = gen_helper_neon_cls_s8,
> > +          .vece = MO_8 },
> > +        { .fni4 = gen_helper_neon_cls_s16,
> > +          .vece = MO_16 },
> > +        { .fni4 = tcg_gen_clrsb_i32,
>
> Why do we have tcg_gen_clrsb_i32(), ...
>
> > +          .vece = MO_32 },
> > +    };
> > +    assert(vece <= MO_32);
> > +    tcg_gen_gvec_2(rd_ofs, rn_ofs, opr_sz, max_sz, &g[vece]);
> > +}
> > +
> > +static void gen_clz32_i32(TCGv_i32 d, TCGv_i32 n)
>
> ... but not tcg_gen_clz32_i32()?

The tcg_gen_clz_i32 primitive has a third argument to specify the result for n == 0. 
Passing that third argument is exactly what gen_clz32_i32 is doing.


r~