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[PATCH v5 6/6] target/riscv: Check svukte is not enabled in RV32
From: |
Fea.Wang |
Subject: |
[PATCH v5 6/6] target/riscv: Check svukte is not enabled in RV32 |
Date: |
Tue, 3 Dec 2024 11:49:32 +0800 |
The spec explicitly says svukte doesn't support RV32. So check that it
is not enabled in RV32.
Signed-off-by: Fea.Wang <fea.wang@sifive.com>
---
target/riscv/tcg/tcg-cpu.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c
index c62c221696..3b99c8c9e3 100644
--- a/target/riscv/tcg/tcg-cpu.c
+++ b/target/riscv/tcg/tcg-cpu.c
@@ -652,6 +652,11 @@ void riscv_cpu_validate_set_extensions(RISCVCPU *cpu,
Error **errp)
return;
}
+ if (mcc->misa_mxl_max == MXL_RV32 && cpu->cfg.ext_svukte) {
+ error_setg(errp, "svukte is not supported for RV32");
+ return;
+ }
+
/*
* Disable isa extensions based on priv spec after we
* validated and set everything we need.
--
2.34.1
- [PATCH v5 0/6] Introduce svukte ISA extension, Fea.Wang, 2024/12/02
- [PATCH v5 1/6] target/riscv: Add svukte extension capability variable, Fea.Wang, 2024/12/02
- [PATCH v5 3/6] target/riscv: Support hstatus[HUKTE] bit when svukte extension is enabled, Fea.Wang, 2024/12/02
- [PATCH v5 2/6] target/riscv: Support senvcfg[UKTE] bit when svukte extension is enabled, Fea.Wang, 2024/12/02
- [PATCH v5 4/6] target/riscv: Check memory access to meet svukte rule, Fea.Wang, 2024/12/02
- [PATCH v5 5/6] target/riscv: Expose svukte ISA extension, Fea.Wang, 2024/12/02
- [PATCH v5 6/6] target/riscv: Check svukte is not enabled in RV32,
Fea.Wang <=
- Re: [PATCH v5 0/6] Introduce svukte ISA extension, Alistair Francis, 2024/12/03