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[PATCH for-10.0 07/11] hw/riscv/riscv-iommu: add IOHPMCYCLES mmio write
From: |
Daniel Henrique Barboza |
Subject: |
[PATCH for-10.0 07/11] hw/riscv/riscv-iommu: add IOHPMCYCLES mmio write |
Date: |
Thu, 5 Dec 2024 10:29:59 -0300 |
From: Tomasz Jeznach <tjeznach@rivosinc.com>
RISCV_IOMMU_REG_IOHPMCYCLES writes are done by
riscv_iommu_process_hpmcycle_write(), called by the mmio write callback
via riscv_iommu_process_hpm_writes().
Signed-off-by: Tomasz Jeznach <tjeznach@rivosinc.com>
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
---
hw/riscv/riscv-iommu-hpm.c | 19 +++++++++++++++++++
hw/riscv/riscv-iommu-hpm.h | 1 +
hw/riscv/riscv-iommu.c | 2 +-
3 files changed, 21 insertions(+), 1 deletion(-)
diff --git a/hw/riscv/riscv-iommu-hpm.c b/hw/riscv/riscv-iommu-hpm.c
index 70814b942d..1cea6b1df1 100644
--- a/hw/riscv/riscv-iommu-hpm.c
+++ b/hw/riscv/riscv-iommu-hpm.c
@@ -262,3 +262,22 @@ void riscv_iommu_process_iocntinh_cy(RISCVIOMMUState *s,
bool prev_cy_inh)
timer_del(s->hpm_timer);
}
}
+
+void riscv_iommu_process_hpmcycle_write(RISCVIOMMUState *s)
+{
+ const uint64_t val = riscv_iommu_reg_get64(s, RISCV_IOMMU_REG_IOHPMCYCLES);
+ const uint32_t ovf = riscv_iommu_reg_get32(s, RISCV_IOMMU_REG_IOCOUNTOVF);
+
+ /*
+ * Clear OF bit in IOCNTOVF if it's being cleared in IOHPMCYCLES register.
+ */
+ if (get_field(ovf, RISCV_IOMMU_IOCOUNTOVF_CY) &&
+ !get_field(val, RISCV_IOMMU_IOHPMCYCLES_OVF)) {
+ riscv_iommu_reg_mod32(s, RISCV_IOMMU_REG_IOCOUNTOVF, 0,
+ RISCV_IOMMU_IOCOUNTOVF_CY);
+ }
+
+ s->hpmcycle_val = val & ~RISCV_IOMMU_IOHPMCYCLES_OVF;
+ s->hpmcycle_prev = get_cycles();
+ hpm_setup_timer(s, s->hpmcycle_val);
+}
diff --git a/hw/riscv/riscv-iommu-hpm.h b/hw/riscv/riscv-iommu-hpm.h
index ee888650fb..0cd550975d 100644
--- a/hw/riscv/riscv-iommu-hpm.h
+++ b/hw/riscv/riscv-iommu-hpm.h
@@ -27,5 +27,6 @@ void riscv_iommu_hpm_incr_ctr(RISCVIOMMUState *s,
RISCVIOMMUContext *ctx,
unsigned event_id);
void riscv_iommu_hpm_timer_cb(void *priv);
void riscv_iommu_process_iocntinh_cy(RISCVIOMMUState *s, bool prev_cy_inh);
+void riscv_iommu_process_hpmcycle_write(RISCVIOMMUState *s);
#endif
diff --git a/hw/riscv/riscv-iommu.c b/hw/riscv/riscv-iommu.c
index 56ec2d6d42..3bdd88df4a 100644
--- a/hw/riscv/riscv-iommu.c
+++ b/hw/riscv/riscv-iommu.c
@@ -1934,7 +1934,7 @@ static void
riscv_iommu_process_hpm_writes(RISCVIOMMUState *s,
case RISCV_IOMMU_REG_IOHPMCYCLES:
case RISCV_IOMMU_REG_IOHPMCYCLES + 4:
- /* not yet implemented */
+ riscv_iommu_process_hpmcycle_write(s);
break;
case RISCV_IOMMU_REG_IOHPMEVT_BASE ...
--
2.47.1
- [PATCH for-10.0 00/11] riscv: IOMMU HPM support, Daniel Henrique Barboza, 2024/12/05
- [PATCH for-10.0 01/11] hw/riscv/riscv-iommu.h: add missing headers, Daniel Henrique Barboza, 2024/12/05
- [PATCH for-10.0 08/11] hw/riscv/riscv-iommu: add hpm events mmio write, Daniel Henrique Barboza, 2024/12/05
- [PATCH for-10.0 02/11] hw/riscv/riscv-iommu-bits.h: HPM bits, Daniel Henrique Barboza, 2024/12/05
- [PATCH for-10.0 06/11] hw/riscv/riscv-iommu: add IOCOUNTINH mmio writes, Daniel Henrique Barboza, 2024/12/05
- [PATCH for-10.0 07/11] hw/riscv/riscv-iommu: add IOHPMCYCLES mmio write,
Daniel Henrique Barboza <=
- [PATCH for-10.0 04/11] hw/riscv/riscv-iommu: add riscv_iommu_hpm_incr_ctr(), Daniel Henrique Barboza, 2024/12/05
- [PATCH for-10.0 10/11] hw/riscv: add IOMMU HPM trace events, Daniel Henrique Barboza, 2024/12/05
- [PATCH for-10.0 09/11] hw/riscv/riscv-iommu.c: add RISCV_IOMMU_CAP_HPM cap, Daniel Henrique Barboza, 2024/12/05
- [PATCH for-10.0 03/11] hw/riscv/riscv-iommu: add riscv-iommu-hpm file, Daniel Henrique Barboza, 2024/12/05
- [PATCH for-10.0 11/11] docs/specs/riscv-iommu.rst: add HPM support info, Daniel Henrique Barboza, 2024/12/05
- [PATCH for-10.0 05/11] hw/riscv/riscv-iommu: instantiate hpm_timer, Daniel Henrique Barboza, 2024/12/05