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答复: [PATCH] hw/net: cadence_gem: feat: add logic for the DISABLE_MASK bi


From: andrew Yuan
Subject: 答复: [PATCH] hw/net: cadence_gem: feat: add logic for the DISABLE_MASK bit in type2_compare_x_word_1
Date: Fri, 6 Dec 2024 02:28:33 +0000

Thanks, Philippe,

lduw_be_p() return a Big-Endian value,
But, as the register description, 
the byte stored in bits [23:16] is compared against the byte in the received 
frame from the selected offset+0 and 
the byte stored in bits [31:24] is compared against the byte in the received 
frame from the selected offset+1.
So, lduw_le_p() is appropriate.

I will resend a patch .

Thanks for your time.

-----邮件原件-----
发件人: Philippe Mathieu-Daudé <philmd@linaro.org> 
发送时间: 2024年12月6日 5:33
收件人: andrew Yuan <andrew.yuan@jaguarmicro.com>; edgar.iglesias@gmail.com; 
alistair@alistair23.me; jasowang@redhat.com; peter.maydell@linaro.org; 
qemu-arm@nongnu.org; qemu-devel@nongnu.org
主题: Re: [PATCH] hw/net: cadence_gem: feat: add logic for the DISABLE_MASK bit 
in type2_compare_x_word_1

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Hi Andrew,

On 18/11/24 12:48, Andrew.Yuan wrote:
> From: Andrew Yuan <andrew.yuan@jaguarmicro.com>
>
> As in the Cadence IP for Gigabit Ethernet MAC Part Number: IP7014 IP 
> Rev: R1p12 - Doc Rev: 1.3 User Guide, if the DISABLE_MASK bit in 
> type2_compare_x_word_1 is set, mask_value in type2_compare_x_word_0 is 
> used as an additional 2 byte Compare Value
>
> Signed-off-by: Andrew Yuan <andrew.yuan@jaguarmicro.com>
> ---
>   hw/net/cadence_gem.c | 25 ++++++++++++++++++++-----
>   1 file changed, 20 insertions(+), 5 deletions(-)
>
> diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c index 
> 526739887c..7ec5dbaa9c 100644
> --- a/hw/net/cadence_gem.c
> +++ b/hw/net/cadence_gem.c
> @@ -909,8 +909,8 @@ static int get_queue_from_screen(CadenceGEMState 
> *s, uint8_t *rxbuf_ptr,
>
>           /* Compare A, B, C */
>           for (j = 0; j < 3; j++) {
> -            uint32_t cr0, cr1, mask, compare;
> -            uint16_t rx_cmp;
> +            uint32_t cr0, cr1, mask, compare, disable_mask;
> +            uint32_t rx_cmp;
>               int offset;
>               int cr_idx = extract32(reg, 
> R_SCREENING_TYPE2_REG0_COMPARE_A_SHIFT + j * 6,
>                                      
> R_SCREENING_TYPE2_REG0_COMPARE_A_LENGTH);
> @@ -946,9 +946,24 @@ static int get_queue_from_screen(CadenceGEMState *s, 
> uint8_t *rxbuf_ptr,
>                   break;
>               }
>
> -            rx_cmp = rxbuf_ptr[offset] << 8 | rxbuf_ptr[offset];
> -            mask = FIELD_EX32(cr0, TYPE2_COMPARE_0_WORD_0, MASK_VALUE);
> -            compare = FIELD_EX32(cr0, TYPE2_COMPARE_0_WORD_0, COMPARE_VALUE);
> +            disable_mask =
> +                FIELD_EX32(cr1, TYPE2_COMPARE_0_WORD_1, DISABLE_MASK);
> +            if (disable_mask) {
> +                /*
> +                 * If disable_mask is set,
> +                 * mask_value is used as an additional 2 byte Compare Value.
> +                 * To simple, set mask = 0xFFFFFFFF, if disable_maks is set.

Typo "disable_mask".

> +                 */
> +                rx_cmp = rxbuf_ptr[offset + 3] << 8 | rxbuf_ptr[offset + 2] 
> |\
> +                         rxbuf_ptr[offset + 1] << 8 | 
> + rxbuf_ptr[offset];

                    rx_cmp = ldl_be_p(rxbuf_ptr[offset]);

> +                mask = 0xFFFFFFFF;
> +                compare = cr0;
> +            } else {
> +                rx_cmp = rxbuf_ptr[offset + 1] << 8 | 
> + rxbuf_ptr[offset];

                    rx_cmp = lduw_be_p(rxbuf_ptr[offset]);

> +                mask = FIELD_EX32(cr0, TYPE2_COMPARE_0_WORD_0, MASK_VALUE);
> +                compare =
> +                    FIELD_EX32(cr0, TYPE2_COMPARE_0_WORD_0, COMPARE_VALUE);
> +            }
>
>               if ((rx_cmp & mask) == (compare & mask)) {
>                   matched = true;


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