[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH 05/11] i386/hvf: Decode APIC access x86 instruction outside BQL
From: |
phil |
Subject: |
[PATCH 05/11] i386/hvf: Decode APIC access x86 instruction outside BQL |
Date: |
Mon, 9 Dec 2024 21:36:23 +0100 |
From: Phil Dennis-Jordan <phil@philjordan.eu>
The HVF accelerator suffers from severe BQL contention under common
practical workloads. x86 instruction decoding for software-emulating
faulted instructions is a somewhat expensive operation, and there
is no need to hold the BQL while performing it. Except in very
unusual edge cases, only an RCU read lock is acquired during the
instruction fetch from memory.
This change therefore moves instruction decoding for APIC access
VM exits to before the BQL is acquired. This improves performance
on APIC-heavy workloads.
It would be nice to eventually move instruction decoding outside
the BQL for MMIO EPT faults as well, but that case is more
complicated as not every EPT fault exit needs decoding/executing.
Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu>
---
target/i386/hvf/hvf.c | 13 ++++++-------
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c
index 095f934923..3f1ff0f013 100644
--- a/target/i386/hvf/hvf.c
+++ b/target/i386/hvf/hvf.c
@@ -444,6 +444,7 @@ int hvf_vcpu_exec(CPUState *cpu)
CPUX86State *env = &x86_cpu->env;
int ret = 0;
uint64_t rip = 0;
+ struct x86_decode decode;
if (hvf_process_events(cpu)) {
return EXCP_HLT;
@@ -481,6 +482,11 @@ int hvf_vcpu_exec(CPUState *cpu)
rip = rreg(cpu->accel->fd, HV_X86_RIP);
env->eflags = rreg(cpu->accel->fd, HV_X86_RFLAGS);
+ if (exit_reason == EXIT_REASON_APIC_ACCESS) {
+ load_regs(cpu);
+ decode_instruction(env, &decode, ins_len);
+ }
+
bql_lock();
update_apic_tpr(cpu);
@@ -519,8 +525,6 @@ int hvf_vcpu_exec(CPUState *cpu)
slot = hvf_find_overlap_slot(gpa, 1);
/* mmio */
if (ept_emulation_fault(slot, gpa, exit_qual)) {
- struct x86_decode decode;
-
load_regs(cpu);
decode_instruction(env, &decode, ins_len);
exec_instruction(env, &decode);
@@ -559,7 +563,6 @@ int hvf_vcpu_exec(CPUState *cpu)
macvm_set_rip(cpu, rip + ins_len);
break;
}
- struct x86_decode decode;
load_regs(cpu);
decode_instruction(env, &decode, ins_len);
@@ -664,10 +667,6 @@ int hvf_vcpu_exec(CPUState *cpu)
break;
}
case EXIT_REASON_APIC_ACCESS: { /* TODO */
- struct x86_decode decode;
-
- load_regs(cpu);
- decode_instruction(env, &decode, ins_len);
exec_instruction(env, &decode);
store_regs(cpu);
break;
--
2.39.3 (Apple Git-146)
- [PATCH 02/11] arm/hvf: Initialise GICv3 state just before first vCPU run, (continued)
- [PATCH 04/11] i386/hvf: Pre-fetch emulated instructions, phil, 2024/12/09
- [PATCH 05/11] i386/hvf: Decode APIC access x86 instruction outside BQL,
phil <=
- [PATCH 09/11] i386/hvf: Print hex pairs for each opcode byte in decode error, phil, 2024/12/09
- [PATCH 07/11] i386/hvf: Enables APIC_ACCESS VM exits by setting APICBASE, phil, 2024/12/09
- [PATCH 06/11] i386/hvf: APIC access exit with fast-path for common mov cases, phil, 2024/12/09
- [PATCH 08/11] i386/hvf: Variable type fixup in decoder, phil, 2024/12/09
- [PATCH 10/11] hw/intc/apic: Fixes magic number use, removes outdated comment, phil, 2024/12/09
- [PATCH 11/11] hw/intc/apic: Raise exception when setting reserved APICBASE bits, phil, 2024/12/09