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[PATCH v2 09/69] target/arm: Convert PAC[ID]*, AUT[ID]* to decodetree
From: |
Richard Henderson |
Subject: |
[PATCH v2 09/69] target/arm: Convert PAC[ID]*, AUT[ID]* to decodetree |
Date: |
Tue, 10 Dec 2024 10:16:33 -0600 |
This includes PACIA, PACIZA, PACIB, PACIZB, PACDA, PACDZA, PACDB,
PACDZB, AUTIA, AUTIZA, AUTIB, AUTIZB, AUTDA, AUTDZA, AUTDB, AUTDZB.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/tcg/translate-a64.c | 173 +++++++++------------------------
target/arm/tcg/a64.decode | 13 +++
2 files changed, 58 insertions(+), 128 deletions(-)
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c
index 552b45b4e2..852545dfcc 100644
--- a/target/arm/tcg/translate-a64.c
+++ b/target/arm/tcg/translate-a64.c
@@ -7764,6 +7764,35 @@ static void gen_cls32(TCGv_i64 tcg_rd, TCGv_i64 tcg_rn)
TRANS(CLZ, gen_rr, a->rd, a->rn, a->sf ? gen_clz64 : gen_clz32)
TRANS(CLS, gen_rr, a->rd, a->rn, a->sf ? tcg_gen_clrsb_i64 : gen_cls32)
+static bool gen_pacaut(DisasContext *s, arg_pacaut *a, NeonGenTwo64OpEnvFn fn)
+{
+ TCGv_i64 tcg_rd, tcg_rn;
+
+ if (a->z) {
+ if (a->rn != 31) {
+ return false;
+ }
+ tcg_rn = tcg_constant_i64(0);
+ } else {
+ tcg_rn = cpu_reg_sp(s, a->rn);
+ }
+ if (s->pauth_active) {
+ tcg_rd = cpu_reg(s, a->rd);
+ fn(tcg_rd, tcg_env, tcg_rd, tcg_rn);
+ }
+ return true;
+}
+
+TRANS_FEAT(PACIA, aa64_pauth, gen_pacaut, a, gen_helper_pacia)
+TRANS_FEAT(PACIB, aa64_pauth, gen_pacaut, a, gen_helper_pacib)
+TRANS_FEAT(PACDA, aa64_pauth, gen_pacaut, a, gen_helper_pacda)
+TRANS_FEAT(PACDB, aa64_pauth, gen_pacaut, a, gen_helper_pacdb)
+
+TRANS_FEAT(AUTIA, aa64_pauth, gen_pacaut, a, gen_helper_autia)
+TRANS_FEAT(AUTIB, aa64_pauth, gen_pacaut, a, gen_helper_autib)
+TRANS_FEAT(AUTDA, aa64_pauth, gen_pacaut, a, gen_helper_autda)
+TRANS_FEAT(AUTDB, aa64_pauth, gen_pacaut, a, gen_helper_autdb)
+
/* Logical (shifted register)
* 31 30 29 28 24 23 22 21 20 16 15 10 9 5 4 0
* +----+-----+-----------+-------+---+------+--------+------+------+
@@ -8373,134 +8402,6 @@ static void disas_data_proc_1src(DisasContext *s,
uint32_t insn)
#define MAP(SF, O2, O1) ((SF) | (O1 << 1) | (O2 << 7))
switch (MAP(sf, opcode2, opcode)) {
- case MAP(1, 0x01, 0x00): /* PACIA */
- if (s->pauth_active) {
- tcg_rd = cpu_reg(s, rd);
- gen_helper_pacia(tcg_rd, tcg_env, tcg_rd, cpu_reg_sp(s, rn));
- } else if (!dc_isar_feature(aa64_pauth, s)) {
- goto do_unallocated;
- }
- break;
- case MAP(1, 0x01, 0x01): /* PACIB */
- if (s->pauth_active) {
- tcg_rd = cpu_reg(s, rd);
- gen_helper_pacib(tcg_rd, tcg_env, tcg_rd, cpu_reg_sp(s, rn));
- } else if (!dc_isar_feature(aa64_pauth, s)) {
- goto do_unallocated;
- }
- break;
- case MAP(1, 0x01, 0x02): /* PACDA */
- if (s->pauth_active) {
- tcg_rd = cpu_reg(s, rd);
- gen_helper_pacda(tcg_rd, tcg_env, tcg_rd, cpu_reg_sp(s, rn));
- } else if (!dc_isar_feature(aa64_pauth, s)) {
- goto do_unallocated;
- }
- break;
- case MAP(1, 0x01, 0x03): /* PACDB */
- if (s->pauth_active) {
- tcg_rd = cpu_reg(s, rd);
- gen_helper_pacdb(tcg_rd, tcg_env, tcg_rd, cpu_reg_sp(s, rn));
- } else if (!dc_isar_feature(aa64_pauth, s)) {
- goto do_unallocated;
- }
- break;
- case MAP(1, 0x01, 0x04): /* AUTIA */
- if (s->pauth_active) {
- tcg_rd = cpu_reg(s, rd);
- gen_helper_autia(tcg_rd, tcg_env, tcg_rd, cpu_reg_sp(s, rn));
- } else if (!dc_isar_feature(aa64_pauth, s)) {
- goto do_unallocated;
- }
- break;
- case MAP(1, 0x01, 0x05): /* AUTIB */
- if (s->pauth_active) {
- tcg_rd = cpu_reg(s, rd);
- gen_helper_autib(tcg_rd, tcg_env, tcg_rd, cpu_reg_sp(s, rn));
- } else if (!dc_isar_feature(aa64_pauth, s)) {
- goto do_unallocated;
- }
- break;
- case MAP(1, 0x01, 0x06): /* AUTDA */
- if (s->pauth_active) {
- tcg_rd = cpu_reg(s, rd);
- gen_helper_autda(tcg_rd, tcg_env, tcg_rd, cpu_reg_sp(s, rn));
- } else if (!dc_isar_feature(aa64_pauth, s)) {
- goto do_unallocated;
- }
- break;
- case MAP(1, 0x01, 0x07): /* AUTDB */
- if (s->pauth_active) {
- tcg_rd = cpu_reg(s, rd);
- gen_helper_autdb(tcg_rd, tcg_env, tcg_rd, cpu_reg_sp(s, rn));
- } else if (!dc_isar_feature(aa64_pauth, s)) {
- goto do_unallocated;
- }
- break;
- case MAP(1, 0x01, 0x08): /* PACIZA */
- if (!dc_isar_feature(aa64_pauth, s) || rn != 31) {
- goto do_unallocated;
- } else if (s->pauth_active) {
- tcg_rd = cpu_reg(s, rd);
- gen_helper_pacia(tcg_rd, tcg_env, tcg_rd, tcg_constant_i64(0));
- }
- break;
- case MAP(1, 0x01, 0x09): /* PACIZB */
- if (!dc_isar_feature(aa64_pauth, s) || rn != 31) {
- goto do_unallocated;
- } else if (s->pauth_active) {
- tcg_rd = cpu_reg(s, rd);
- gen_helper_pacib(tcg_rd, tcg_env, tcg_rd, tcg_constant_i64(0));
- }
- break;
- case MAP(1, 0x01, 0x0a): /* PACDZA */
- if (!dc_isar_feature(aa64_pauth, s) || rn != 31) {
- goto do_unallocated;
- } else if (s->pauth_active) {
- tcg_rd = cpu_reg(s, rd);
- gen_helper_pacda(tcg_rd, tcg_env, tcg_rd, tcg_constant_i64(0));
- }
- break;
- case MAP(1, 0x01, 0x0b): /* PACDZB */
- if (!dc_isar_feature(aa64_pauth, s) || rn != 31) {
- goto do_unallocated;
- } else if (s->pauth_active) {
- tcg_rd = cpu_reg(s, rd);
- gen_helper_pacdb(tcg_rd, tcg_env, tcg_rd, tcg_constant_i64(0));
- }
- break;
- case MAP(1, 0x01, 0x0c): /* AUTIZA */
- if (!dc_isar_feature(aa64_pauth, s) || rn != 31) {
- goto do_unallocated;
- } else if (s->pauth_active) {
- tcg_rd = cpu_reg(s, rd);
- gen_helper_autia(tcg_rd, tcg_env, tcg_rd, tcg_constant_i64(0));
- }
- break;
- case MAP(1, 0x01, 0x0d): /* AUTIZB */
- if (!dc_isar_feature(aa64_pauth, s) || rn != 31) {
- goto do_unallocated;
- } else if (s->pauth_active) {
- tcg_rd = cpu_reg(s, rd);
- gen_helper_autib(tcg_rd, tcg_env, tcg_rd, tcg_constant_i64(0));
- }
- break;
- case MAP(1, 0x01, 0x0e): /* AUTDZA */
- if (!dc_isar_feature(aa64_pauth, s) || rn != 31) {
- goto do_unallocated;
- } else if (s->pauth_active) {
- tcg_rd = cpu_reg(s, rd);
- gen_helper_autda(tcg_rd, tcg_env, tcg_rd, tcg_constant_i64(0));
- }
- break;
- case MAP(1, 0x01, 0x0f): /* AUTDZB */
- if (!dc_isar_feature(aa64_pauth, s) || rn != 31) {
- goto do_unallocated;
- } else if (s->pauth_active) {
- tcg_rd = cpu_reg(s, rd);
- gen_helper_autdb(tcg_rd, tcg_env, tcg_rd, tcg_constant_i64(0));
- }
- break;
case MAP(1, 0x01, 0x10): /* XPACI */
if (!dc_isar_feature(aa64_pauth, s) || rn != 31) {
goto do_unallocated;
@@ -8530,6 +8431,22 @@ static void disas_data_proc_1src(DisasContext *s,
uint32_t insn)
case MAP(1, 0x00, 0x04):
case MAP(0, 0x00, 0x05): /* CLS */
case MAP(1, 0x00, 0x05):
+ case MAP(1, 0x01, 0x00): /* PACIA */
+ case MAP(1, 0x01, 0x01): /* PACIB */
+ case MAP(1, 0x01, 0x02): /* PACDA */
+ case MAP(1, 0x01, 0x03): /* PACDB */
+ case MAP(1, 0x01, 0x04): /* AUTIA */
+ case MAP(1, 0x01, 0x05): /* AUTIB */
+ case MAP(1, 0x01, 0x06): /* AUTDA */
+ case MAP(1, 0x01, 0x07): /* AUTDB */
+ case MAP(1, 0x01, 0x08): /* PACIZA */
+ case MAP(1, 0x01, 0x09): /* PACIZB */
+ case MAP(1, 0x01, 0x0a): /* PACDZA */
+ case MAP(1, 0x01, 0x0b): /* PACDZB */
+ case MAP(1, 0x01, 0x0c): /* AUTIZA */
+ case MAP(1, 0x01, 0x0d): /* AUTIZB */
+ case MAP(1, 0x01, 0x0e): /* AUTDZA */
+ case MAP(1, 0x01, 0x0f): /* AUTDZB */
unallocated_encoding(s);
break;
}
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index 410eaa9333..9083ac4ac3 100644
--- a/target/arm/tcg/a64.decode
+++ b/target/arm/tcg/a64.decode
@@ -699,6 +699,19 @@ REV64 1 10 11010110 00000 000011 ..... ..... @rr
CLZ . 10 11010110 00000 000100 ..... ..... @rr_sf
CLS . 10 11010110 00000 000101 ..... ..... @rr_sf
+&pacaut rd rn z
+@pacaut . .. ........ ..... .. z:1 ... rn:5 rd:5 &pacaut
+
+PACIA 1 10 11010110 00001 00.000 ..... ..... @pacaut
+PACIB 1 10 11010110 00001 00.001 ..... ..... @pacaut
+PACDA 1 10 11010110 00001 00.010 ..... ..... @pacaut
+PACDB 1 10 11010110 00001 00.011 ..... ..... @pacaut
+
+AUTIA 1 10 11010110 00001 00.100 ..... ..... @pacaut
+AUTIB 1 10 11010110 00001 00.101 ..... ..... @pacaut
+AUTDA 1 10 11010110 00001 00.110 ..... ..... @pacaut
+AUTDB 1 10 11010110 00001 00.111 ..... ..... @pacaut
+
# Logical (shifted reg)
# Add/subtract (shifted reg)
# Add/subtract (extended reg)
--
2.43.0
- [PATCH v2 00/69] target/arm: AArch64 decodetree conversion, final part, Richard Henderson, 2024/12/10
- [PATCH v2 01/69] target/arm: Add section labels for "Data Processing (register)", Richard Henderson, 2024/12/10
- [PATCH v2 02/69] target/arm: Convert UDIV, SDIV to decodetree, Richard Henderson, 2024/12/10
- [PATCH v2 03/69] target/arm: Convert LSLV, LSRV, ASRV, RORV to decodetree, Richard Henderson, 2024/12/10
- [PATCH v2 04/69] target/arm: Convert CRC32, CRC32C to decodetree, Richard Henderson, 2024/12/10
- [PATCH v2 05/69] target/arm: Convert SUBP, IRG, GMI to decodetree, Richard Henderson, 2024/12/10
- [PATCH v2 06/69] target/arm: Convert PACGA to decodetree, Richard Henderson, 2024/12/10
- [PATCH v2 07/69] target/arm: Convert RBIT, REV16, REV32, REV64 to decodetree, Richard Henderson, 2024/12/10
- [PATCH v2 08/69] target/arm: Convert CLZ, CLS to decodetree, Richard Henderson, 2024/12/10
- [PATCH v2 09/69] target/arm: Convert PAC[ID]*, AUT[ID]* to decodetree,
Richard Henderson <=
- [PATCH v2 10/69] target/arm: Convert XPAC[ID] to decodetree, Richard Henderson, 2024/12/10
- [PATCH v2 11/69] target/arm: Convert disas_logic_reg to decodetree, Richard Henderson, 2024/12/10
- [PATCH v2 12/69] target/arm: Convert disas_add_sub_ext_reg to decodetree, Richard Henderson, 2024/12/10
- [PATCH v2 13/69] target/arm: Convert disas_add_sub_reg to decodetree, Richard Henderson, 2024/12/10
- [PATCH v2 14/69] target/arm: Convert disas_data_proc_3src to decodetree, Richard Henderson, 2024/12/10
- [PATCH v2 15/69] target/arm: Convert disas_adc_sbc to decodetree, Richard Henderson, 2024/12/10
- [PATCH v2 18/69] target/arm: Convert CCMP, CCMN to decodetree, Richard Henderson, 2024/12/10
- [PATCH v2 19/69] target/arm: Convert disas_cond_select to decodetree, Richard Henderson, 2024/12/10
- [PATCH v2 21/69] target/arm: Introduce fp_access_check_vector_hsd, Richard Henderson, 2024/12/10
- [PATCH v2 22/69] target/arm: Convert FCMP, FCMPE, FCCMP, FCCMPE to decodetree, Richard Henderson, 2024/12/10