[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 47/85] target/arm: Remove helper_neon_{add,sub}l_u{16,32}
From: |
Peter Maydell |
Subject: |
[PULL 47/85] target/arm: Remove helper_neon_{add,sub}l_u{16,32} |
Date: |
Fri, 13 Dec 2024 17:31:51 +0000 |
From: Richard Henderson <richard.henderson@linaro.org>
These have generic equivalents: tcg_gen_vec_{add,sub}{16,32}_i64.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20241211163036.2297116-48-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/helper.h | 4 ----
target/arm/tcg/neon_helper.c | 36 ---------------------------------
target/arm/tcg/translate-neon.c | 22 ++++++++++----------
3 files changed, 11 insertions(+), 51 deletions(-)
diff --git a/target/arm/helper.h b/target/arm/helper.h
index 6369d07d053..04e422ab081 100644
--- a/target/arm/helper.h
+++ b/target/arm/helper.h
@@ -395,12 +395,8 @@ DEF_HELPER_1(neon_widen_s8, i64, i32)
DEF_HELPER_1(neon_widen_u16, i64, i32)
DEF_HELPER_1(neon_widen_s16, i64, i32)
-DEF_HELPER_2(neon_addl_u16, i64, i64, i64)
-DEF_HELPER_2(neon_addl_u32, i64, i64, i64)
DEF_HELPER_FLAGS_1(neon_addlp_s8, TCG_CALL_NO_RWG_SE, i64, i64)
DEF_HELPER_FLAGS_1(neon_addlp_s16, TCG_CALL_NO_RWG_SE, i64, i64)
-DEF_HELPER_2(neon_subl_u16, i64, i64, i64)
-DEF_HELPER_2(neon_subl_u32, i64, i64, i64)
DEF_HELPER_3(neon_addl_saturate_s32, i64, env, i64, i64)
DEF_HELPER_3(neon_addl_saturate_s64, i64, env, i64, i64)
DEF_HELPER_2(neon_abdl_u16, i64, i32, i32)
diff --git a/target/arm/tcg/neon_helper.c b/target/arm/tcg/neon_helper.c
index 1a22857b5eb..c687e882ad9 100644
--- a/target/arm/tcg/neon_helper.c
+++ b/target/arm/tcg/neon_helper.c
@@ -826,24 +826,6 @@ uint64_t HELPER(neon_widen_s16)(uint32_t x)
return ((uint32_t)(int16_t)x) | (high << 32);
}
-uint64_t HELPER(neon_addl_u16)(uint64_t a, uint64_t b)
-{
- uint64_t mask;
- mask = (a ^ b) & 0x8000800080008000ull;
- a &= ~0x8000800080008000ull;
- b &= ~0x8000800080008000ull;
- return (a + b) ^ mask;
-}
-
-uint64_t HELPER(neon_addl_u32)(uint64_t a, uint64_t b)
-{
- uint64_t mask;
- mask = (a ^ b) & 0x8000000080000000ull;
- a &= ~0x8000000080000000ull;
- b &= ~0x8000000080000000ull;
- return (a + b) ^ mask;
-}
-
/* Pairwise long add: add pairs of adjacent elements into
* double-width elements in the result (eg _s8 is an 8x8->16 op)
*/
@@ -887,24 +869,6 @@ uint64_t HELPER(neon_addlp_s16)(uint64_t a)
return (uint32_t)reslo | (((uint64_t)reshi) << 32);
}
-uint64_t HELPER(neon_subl_u16)(uint64_t a, uint64_t b)
-{
- uint64_t mask;
- mask = (a ^ ~b) & 0x8000800080008000ull;
- a |= 0x8000800080008000ull;
- b &= ~0x8000800080008000ull;
- return (a - b) ^ mask;
-}
-
-uint64_t HELPER(neon_subl_u32)(uint64_t a, uint64_t b)
-{
- uint64_t mask;
- mask = (a ^ ~b) & 0x8000000080000000ull;
- a |= 0x8000000080000000ull;
- b &= ~0x8000000080000000ull;
- return (a - b) ^ mask;
-}
-
uint64_t HELPER(neon_addl_saturate_s32)(CPUARMState *env, uint64_t a, uint64_t
b)
{
uint32_t x, y;
diff --git a/target/arm/tcg/translate-neon.c b/target/arm/tcg/translate-neon.c
index 19a18018f1a..0821f10fad5 100644
--- a/target/arm/tcg/translate-neon.c
+++ b/target/arm/tcg/translate-neon.c
@@ -1560,8 +1560,8 @@ static bool do_prewiden_3d(DisasContext *s, arg_3diff *a,
NULL, NULL, \
}; \
static NeonGenTwo64OpFn * const addfn[] = { \
- gen_helper_neon_##OP##l_u16, \
- gen_helper_neon_##OP##l_u32, \
+ tcg_gen_vec_##OP##16_i64, \
+ tcg_gen_vec_##OP##32_i64, \
tcg_gen_##OP##_i64, \
NULL, \
}; \
@@ -1639,8 +1639,8 @@ static bool do_narrow_3d(DisasContext *s, arg_3diff *a,
static bool trans_##INSN##_3d(DisasContext *s, arg_3diff *a) \
{ \
static NeonGenTwo64OpFn * const addfn[] = { \
- gen_helper_neon_##OP##l_u16, \
- gen_helper_neon_##OP##l_u32, \
+ tcg_gen_vec_##OP##16_i64, \
+ tcg_gen_vec_##OP##32_i64, \
tcg_gen_##OP##_i64, \
NULL, \
}; \
@@ -1761,8 +1761,8 @@ static bool trans_VABAL_S_3d(DisasContext *s, arg_3diff
*a)
NULL,
};
static NeonGenTwo64OpFn * const addfn[] = {
- gen_helper_neon_addl_u16,
- gen_helper_neon_addl_u32,
+ tcg_gen_vec_add16_i64,
+ tcg_gen_vec_add32_i64,
tcg_gen_add_i64,
NULL,
};
@@ -1779,8 +1779,8 @@ static bool trans_VABAL_U_3d(DisasContext *s, arg_3diff
*a)
NULL,
};
static NeonGenTwo64OpFn * const addfn[] = {
- gen_helper_neon_addl_u16,
- gen_helper_neon_addl_u32,
+ tcg_gen_vec_add16_i64,
+ tcg_gen_vec_add32_i64,
tcg_gen_add_i64,
NULL,
};
@@ -1840,8 +1840,8 @@ static bool trans_VMULL_U_3d(DisasContext *s, arg_3diff
*a)
NULL, \
}; \
static NeonGenTwo64OpFn * const accfn[] = { \
- gen_helper_neon_##ACC##l_u16, \
- gen_helper_neon_##ACC##l_u32, \
+ tcg_gen_vec_##ACC##16_i64, \
+ tcg_gen_vec_##ACC##32_i64, \
tcg_gen_##ACC##_i64, \
NULL, \
}; \
@@ -2371,7 +2371,7 @@ static bool trans_VMULL_U_2sc(DisasContext *s,
arg_2scalar *a)
}; \
static NeonGenTwo64OpFn * const accfn[] = { \
NULL, \
- gen_helper_neon_##ACC##l_u32, \
+ tcg_gen_vec_##ACC##32_i64, \
tcg_gen_##ACC##_i64, \
NULL, \
}; \
--
2.34.1
- [PULL 27/85] target/arm: Convert FSQRT (scalar) to decodetree, (continued)
- [PULL 27/85] target/arm: Convert FSQRT (scalar) to decodetree, Peter Maydell, 2024/12/13
- [PULL 28/85] target/arm: Convert FRINT[NPMSAXI] (scalar) to decodetree, Peter Maydell, 2024/12/13
- [PULL 30/85] target/arm: Convert FRINT{32, 64}[ZX] (scalar) to decodetree, Peter Maydell, 2024/12/13
- [PULL 31/85] target/arm: Convert FCVT (scalar) to decodetree, Peter Maydell, 2024/12/13
- [PULL 35/85] target/arm: Convert SQABS, SQNEG to decodetree, Peter Maydell, 2024/12/13
- [PULL 37/85] target/arm: Introduce gen_gvec_cls, gen_gvec_clz, Peter Maydell, 2024/12/13
- [PULL 41/85] target/arm: Convert CMGT, CMGE, GMLT, GMLE, CMEQ (zero) to decodetree, Peter Maydell, 2024/12/13
- [PULL 40/85] target/arm: Convert CNT, NOT, RBIT (vector) to decodetree, Peter Maydell, 2024/12/13
- [PULL 42/85] target/arm: Introduce gen_gvec_rev{16,32,64}, Peter Maydell, 2024/12/13
- [PULL 43/85] target/arm: Convert handle_rev to decodetree, Peter Maydell, 2024/12/13
- [PULL 47/85] target/arm: Remove helper_neon_{add,sub}l_u{16,32},
Peter Maydell <=
- [PULL 46/85] target/arm: Convert handle_2misc_pairwise to decodetree, Peter Maydell, 2024/12/13
- [PULL 52/85] target/arm: Convert SHLL to decodetree, Peter Maydell, 2024/12/13
- [PULL 50/85] target/arm: Convert FCVTN, BFCVTN to decodetree, Peter Maydell, 2024/12/13
- [PULL 54/85] target/arm: Convert FABS, FNEG (vector) to decodetree, Peter Maydell, 2024/12/13
- [PULL 53/85] target/arm: Implement gen_gvec_fabs, gen_gvec_fneg, Peter Maydell, 2024/12/13
- [PULL 07/85] target/arm: Convert RBIT, REV16, REV32, REV64 to decodetree, Peter Maydell, 2024/12/13
- [PULL 39/85] target/arm: Introduce gen_gvec_cnt, gen_gvec_rbit, Peter Maydell, 2024/12/13
- [PULL 45/85] target/arm: Introduce gen_gvec_{s,u}{add,ada}lp, Peter Maydell, 2024/12/13
- [PULL 56/85] target/arm: Convert FRINT* (vector) to decodetree, Peter Maydell, 2024/12/13
- [PULL 60/85] target/arm: Convert [US]CVTF (vector, fixed-point) scalar to decodetree, Peter Maydell, 2024/12/13