[PATCH v2 0/9] target/riscv: add 'sha' support

[Daniel Henrique Barboza]

Hi,

In this version the errors with 'bios-tables-test' qtest are fixed in
each patch that ended up breaking it. The test will break every time
we're changing the default riscv,isa DT from the 'rv64' CPU.

This doesn't happen that often so for now I think we'll bite the bullet,
but if this becomes annoying we'll have to consider another solution,
e.g. use a more stable CPU for bios-tables-test.

Alistair, I'm resending all patches, including patches 1 and 2 that are
already applied in riscv-to-apply.next. Feel free to keep the tree as is
and apply just 3-9.

All patches acked/reviewed.

Changes from v1:
- patches 3,4,5,6,7,8: change bios-tables-test to match the changes in
  riscv,isa
- v1 link: 
https://lore.kernel.org/qemu-riscv/20241113171755.978109-1-dbarboza@ventanamicro.com/

Daniel Henrique Barboza (9):
  target/riscv/tcg: hide warn for named feats when disabling via
    priv_ver
  target/riscv: add ssstateen
  target/riscv: add shcounterenw
  target/riscv: add shvstvala
  target/riscv: add shtvala
  target/riscv: add shvstvecd
  target/riscv: add shvsatpa
  target/riscv: add shgatpa
  target/riscv/tcg: add sha

 target/riscv/cpu.c                |  10 ++++++++++
 target/riscv/cpu_cfg.h            |   2 ++
 target/riscv/tcg/tcg-cpu.c        |  30 ++++++++++++++++++++++++++----
 tests/data/acpi/riscv64/virt/RHCT | Bin 332 -> 390 bytes
 4 files changed, 38 insertions(+), 4 deletions(-)

-- 
2.47.1