Re: [PATCH 1/3] target/loongarch: Enable rotr.w/rotri.w for LoongArch32

[Jiaxun Yang]

在2024年12月23日十二月 下午12:46，Philippe Mathieu-Daudé写道：
> On 23/12/24 00:40, Jiaxun Yang wrote:
>> As per "LoongArch Reference Manual Volume 1: Basic Architecture" v1.1.0,
>> "2.2 Table 2. Application-level basic integer instructions in LA32",
>> rotr.w and rotri.w is a part of LA32 basic integer instructions.
>> 
>> Make it available to ALL.
>> 
>> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
>> ---
>>   target/loongarch/tcg/insn_trans/trans_shift.c.inc | 4 ++--
>>   1 file changed, 2 insertions(+), 2 deletions(-)
>> 
>> diff --git a/target/loongarch/tcg/insn_trans/trans_shift.c.inc 
>> b/target/loongarch/tcg/insn_trans/trans_shift.c.inc
>> index 
>> 377307785aab4837bc181f1691632e7970a9889d..136c4c845527f0e63902a8306dcaf136dd4dd3fc
>>  100644
>> --- a/target/loongarch/tcg/insn_trans/trans_shift.c.inc
>> +++ b/target/loongarch/tcg/insn_trans/trans_shift.c.inc
>> @@ -78,7 +78,7 @@ TRANS(sra_w, ALL, gen_rrr, EXT_SIGN, EXT_NONE, EXT_SIGN, 
>> gen_sra_w)
>>   TRANS(sll_d, 64, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, gen_sll_d)
>>   TRANS(srl_d, 64, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, gen_srl_d)
>>   TRANS(sra_d, 64, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, gen_sra_d)
>> -TRANS(rotr_w, 64, gen_rrr, EXT_ZERO, EXT_NONE, EXT_SIGN, gen_rotr_w)
>> +TRANS(rotr_w, ALL, gen_rrr, EXT_ZERO, EXT_NONE, EXT_SIGN, gen_rotr_w)
>
> Using 'ALL' disables the availability check, is that what we want here?
> (I don't know, maybe it is, I couldn't see any LA32R/LA32 instructions
> checked).

I think it’s indeed not checked presently.

I discovered that when I was getting LA32 kernel to run on QEMU.

Those two instructions exist on LA32 but not LA32R.

For LA32R, I’ll take care of it later.

Thanks
>
>>   TRANS(rotr_d, 64, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, gen_rotr_d)
>>   TRANS(slli_w, ALL, gen_rri_c, EXT_NONE, EXT_SIGN, tcg_gen_shli_tl)
>>   TRANS(slli_d, 64, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_shli_tl)
>> @@ -86,5 +86,5 @@ TRANS(srli_w, ALL, gen_rri_c, EXT_ZERO, EXT_SIGN, 
>> tcg_gen_shri_tl)
>>   TRANS(srli_d, 64, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_shri_tl)
>>   TRANS(srai_w, ALL, gen_rri_c, EXT_NONE, EXT_NONE, gen_sari_w)
>>   TRANS(srai_d, 64, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_sari_tl)
>> -TRANS(rotri_w, 64, gen_rri_v, EXT_NONE, EXT_NONE, gen_rotr_w)
>> +TRANS(rotri_w, ALL, gen_rri_v, EXT_NONE, EXT_NONE, gen_rotr_w)
>>   TRANS(rotri_d, 64, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_rotri_tl)
>>

-- 
- Jiaxun