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[PULL 58/72] softfloat: Remove float_muladd_halve_result
From: |
Richard Henderson |
Subject: |
[PULL 58/72] softfloat: Remove float_muladd_halve_result |
Date: |
Tue, 24 Dec 2024 12:05:07 -0800 |
All uses have been convered to float*_muladd_scalbn.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/fpu/softfloat.h | 3 ---
fpu/softfloat.c | 6 ------
fpu/softfloat-parts.c.inc | 4 ----
3 files changed, 13 deletions(-)
diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
index c34ce0477d..aa69aecfb0 100644
--- a/include/fpu/softfloat.h
+++ b/include/fpu/softfloat.h
@@ -120,14 +120,11 @@ bfloat16 bfloat16_squash_input_denormal(bfloat16 a,
float_status *status);
| Using these differs from negating an input or output before calling
| the muladd function in that this means that a NaN doesn't have its
| sign bit inverted before it is propagated.
-| We also support halving the result before rounding, as a special
-| case to support the ARM fused-sqrt-step instruction FRSQRTS.
*----------------------------------------------------------------------------*/
enum {
float_muladd_negate_c = 1,
float_muladd_negate_product = 2,
float_muladd_negate_result = 4,
- float_muladd_halve_result = 8,
};
/*----------------------------------------------------------------------------
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index b5936cc0f8..6967fb5c9f 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -2274,9 +2274,6 @@ float32_muladd(float32 xa, float32 xb, float32 xc, int
flags, float_status *s)
if (unlikely(!can_use_fpu(s))) {
goto soft;
}
- if (unlikely(flags & float_muladd_halve_result)) {
- goto soft;
- }
float32_input_flush3(&ua.s, &ub.s, &uc.s, s);
if (unlikely(!f32_is_zon3(ua, ub, uc))) {
@@ -2345,9 +2342,6 @@ float64_muladd(float64 xa, float64 xb, float64 xc, int
flags, float_status *s)
if (unlikely(!can_use_fpu(s))) {
goto soft;
}
- if (unlikely(flags & float_muladd_halve_result)) {
- goto soft;
- }
float64_input_flush3(&ua.s, &ub.s, &uc.s, s);
if (unlikely(!f64_is_zon3(ua, ub, uc))) {
diff --git a/fpu/softfloat-parts.c.inc b/fpu/softfloat-parts.c.inc
index 4a62d6ca24..a724f317c5 100644
--- a/fpu/softfloat-parts.c.inc
+++ b/fpu/softfloat-parts.c.inc
@@ -653,10 +653,6 @@ static FloatPartsN *partsN(muladd_scalbn)(FloatPartsN *a,
FloatPartsN *b,
a->exp = p_widen.exp;
return_normal:
- /* TODO: Replace all use of float_muladd_halve_result with scale. */
- if (flags & float_muladd_halve_result) {
- a->exp -= 1;
- }
a->exp += scale;
finish_sign:
if (flags & float_muladd_negate_result) {
--
2.43.0
- [PULL 55/72] softfloat: Add float{16,32,64}_muladd_scalbn, (continued)
- [PULL 55/72] softfloat: Add float{16,32,64}_muladd_scalbn, Richard Henderson, 2024/12/24
- [PULL 57/72] target/sparc: Use float*_muladd_scalbn, Richard Henderson, 2024/12/24
- [PULL 59/72] softfloat: Add float_round_nearest_even_max, Richard Henderson, 2024/12/24
- [PULL 48/72] tcg/optimize: Use fold_masks_zs in fold_xor, Richard Henderson, 2024/12/24
- [PULL 50/72] tcg/optimize: Use finish_folding as default in tcg_optimize, Richard Henderson, 2024/12/24
- [PULL 42/72] tcg/optimize: Use fold_masks_zs in fold_sextract, Richard Henderson, 2024/12/24
- [PULL 46/72] tcg/optimize: Use fold_masks_zs in fold_tcg_ld, Richard Henderson, 2024/12/24
- [PULL 47/72] tcg/optimize: Use finish_folding in fold_tcg_ld_memcopy, Richard Henderson, 2024/12/24
- [PULL 49/72] tcg/optimize: Use finish_folding in fold_bitsel_vec, Richard Henderson, 2024/12/24
- [PULL 53/72] tcg/optimize: Move fold_bitsel_vec into alphabetic sort, Richard Henderson, 2024/12/24
- [PULL 58/72] softfloat: Remove float_muladd_halve_result,
Richard Henderson <=
- [PULL 60/72] softfloat: Add float_muladd_suppress_add_product_zero, Richard Henderson, 2024/12/24
- [PULL 61/72] target/hexagon: Use float32_mul in helper_sfmpy, Richard Henderson, 2024/12/24
- [PULL 64/72] target/hexagon: Use float32_muladd_scalbn for helper_sffma_sc, Richard Henderson, 2024/12/24
- [PULL 68/72] target/hexagon: Remove Float, Richard Henderson, 2024/12/24
- [PULL 44/72] tcg/optimize: Simplify sign bit test in fold_shift, Richard Henderson, 2024/12/24
- [PULL 56/72] target/arm: Use float*_muladd_scalbn, Richard Henderson, 2024/12/24
- [PULL 52/72] tcg/optimize: Re-enable sign-mask optimizations, Richard Henderson, 2024/12/24
- [PULL 69/72] target/hexagon: Remove Double, Richard Henderson, 2024/12/24
- [PULL 70/72] target/hexagon: Use mulu64 for int128_mul_6464, Richard Henderson, 2024/12/24
- [PULL 51/72] tcg/optimize: Remove z_mask, s_mask from OptContext, Richard Henderson, 2024/12/24