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Re: [PULL 1/2] target/hppa: Add CPU reset method


From: Philippe Mathieu-Daudé
Subject: Re: [PULL 1/2] target/hppa: Add CPU reset method
Date: Mon, 30 Dec 2024 14:07:54 +0100
User-agent: Mozilla Thunderbird

Hi Helge,

On 30/12/24 01:22, deller@kernel.org wrote:
From: Helge Deller <deller@gmx.de>

Add the CPU reset method, which resets all CPU registers and the TLB to
zero. Then the CPU will switch to 32-bit mode (PSW_W bit is not set) and
start execution at address 0xf0000004.
Although we currently want to zero out all values in the CPUHPPAState
struct, add the end_reset_fields marker in case the state structs gets
extended with other variables later on which should not be reset.

This patch is doing multiple things at once.

Signed-off-by: Helge Deller <deller@gmx.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
  hw/hppa/machine.c |  6 +++---
  target/hppa/cpu.c | 26 ++++++++++++++++++++++++--
  target/hppa/cpu.h |  5 +++++
  3 files changed, 32 insertions(+), 5 deletions(-)


diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c
index c38439c180..cb1b5191a4 100644
--- a/target/hppa/cpu.c
+++ b/target/hppa/cpu.c
@@ -194,11 +194,9 @@ static void hppa_cpu_realizefn(DeviceState *dev, Error 
**errp)
static void hppa_cpu_initfn(Object *obj)
  {
-    CPUState *cs = CPU(obj);
      HPPACPU *cpu = HPPA_CPU(obj);
      CPUHPPAState *env = &cpu->env;
- cs->exception_index = -1;
      cpu_hppa_loaded_fr0(env);
      cpu_hppa_put_psw(env, PSW_W);

This is reset code.

Should PSW_M bit set on hard reset?

  }
@@ -235,15 +233,39 @@ static const TCGCPUOps hppa_tcg_ops = {
  #endif /* !CONFIG_USER_ONLY */
  };
+static void hppa_cpu_reset_hold(Object *obj, ResetType type)
+{
+    HPPACPU *cpu = HPPA_CPU(obj);
+    HPPACPUClass *scc = HPPA_CPU_GET_CLASS(cpu);
+    CPUHPPAState *env = &cpu->env;
+    CPUState *cs = CPU(cpu);
+
+    if (scc->parent_phases.hold) {
+        scc->parent_phases.hold(obj, type);
+    }
+
+    memset(env, 0, offsetof(CPUHPPAState, end_reset_fields));
+    cpu_set_pc(cs, 0xf0000004);
+    cpu_hppa_put_psw(env, hppa_is_pa20(env) ? PSW_W : 0);

PSW_W is already cleared in cpu_hppa_put_psw() for PA1.x.

+    cpu_hppa_loaded_fr0(env);
+
+    cs->exception_index = -1;
+    cs->halted = 0;
+}

For clarity I'll respin your patch including my comments.



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