Re: [qemu PATCH 0/3] target/riscv: add missing named features

[Alistair Francis]

On Fri, May 30, 2025 at 6:24 AM Daniel Henrique Barboza
<dbarboza@ventanamicro.com> wrote:
>
> Hi,
>
> These simple patches add two missing named features in riscv,isa.  Third
> patch is a doc change I figured was worth doing.
>
> Drew, as far as Server SoC Reference platform goes, we don't have
> 'sdext'. I guess we'll have to postpone the Server Soc Ref work for now.
>
> Daniel Henrique Barboza (3):
>   target/riscv/cpu.c: add 'sdtrig' in riscv,isa
>   target/riscv/cpu.c: add 'ssstrict' to riscv,isa
>   target/riscv/cpu.c: do better with 'named features' doc

Thanks!

Applied to riscv-to-apply.next

Alistair

>
>  target/riscv/cpu.c | 16 ++++++++++++++--
>  1 file changed, 14 insertions(+), 2 deletions(-)
>
> --
> 2.49.0
>
>