Re: [Qemu-ppc] [Qemu-devel] [PATCH v2 4/6] prep: move int-ack register from PReP to Raven PCI emulation

[Andreas Färber]

Am 14.04.2012 22:48, schrieb Hervé Poussineau:
> Register is one byte-wide (as per specification), so there is no need to 
> specify endianness.

The region was 4 bytes before, now it's 1. What happens when a 4-byte
read is attempted at that address? Do we need to specify the valid
widths for the MemoryRegion? Or is such a read constructed from this
region and (assuming) the return value of an unassigned read?

> diff --git a/hw/prep_pci.c b/hw/prep_pci.c
> index 8b29da9..43847f5 100644
> --- a/hw/prep_pci.c
> +++ b/hw/prep_pci.c
> @@ -25,10 +25,12 @@
>  #include "hw.h"
>  #include "pci.h"
>  #include "pci_host.h"
> +#include "pc.h"

Is that for pic_read_irq()?

Andreas

>  #include "exec-memory.h"
>  
>  typedef struct PRePPCIState {
>      PCIHostState host_state;
> +    MemoryRegion intack;
>      qemu_irq irq[4];
>  } PREPPCIState;
>  
> @@ -67,6 +69,16 @@ static const MemoryRegionOps PPC_PCIIO_ops = {
>      .endianness = DEVICE_LITTLE_ENDIAN,
>  };
>  
> +static uint64_t ppc_intack_read(void *opaque, target_phys_addr_t addr,
> +                                unsigned int size)
> +{
> +    return pic_read_irq(isa_pic);
> +}
> +
> +static const MemoryRegionOps PPC_intack_ops = {
> +    .read = ppc_intack_read,
> +};
> +
>  static int prep_map_irq(PCIDevice *pci_dev, int irq_num)
>  {
>      return (irq_num + (pci_dev->devfn >> 3)) & 1;
> @@ -110,6 +122,8 @@ static int raven_pcihost_init(SysBusDevice *dev)
>      memory_region_init_io(&h->mmcfg, &PPC_PCIIO_ops, s, "pciio", 0x00400000);
>      memory_region_add_subregion(address_space_mem, 0x80800000, &h->mmcfg);
>  
> +    memory_region_init_io(&s->intack, &PPC_intack_ops, s, "pci-intack", 1);
> +    memory_region_add_subregion(address_space_mem, 0xbffffff0, &s->intack);
>      pci_create_simple(bus, 0, "raven");
>  
>      return 0;