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[Qemu-ppc] [PATCH 33/48] mmu-hash32: Clean up BAT matching logic
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PATCH 33/48] mmu-hash32: Clean up BAT matching logic |
Date: |
Tue, 12 Mar 2013 21:31:35 +1100 |
The code to search for a matching BAT for a virtual address is somewhat
longwinded and awkward. In particular, it relies on seperate size and
validity information being returned from the hash32_bat_size() function
(and 601 specific variant).
We simplify this by having hash32_bat_size() return instead a mask of the
virtual address bits to match, and 0 for invalid (since a BAT can never
match the entire address space).
Signed-off-by: David Gibson <address@hidden>
---
target-ppc/mmu-hash32.c | 74 +++++++++++++++++++----------------------------
target-ppc/mmu-hash32.h | 4 ---
2 files changed, 30 insertions(+), 48 deletions(-)
diff --git a/target-ppc/mmu-hash32.c b/target-ppc/mmu-hash32.c
index 6c71ebd..40d3564 100644
--- a/target-ppc/mmu-hash32.c
+++ b/target-ppc/mmu-hash32.c
@@ -113,20 +113,15 @@ static int ppc_hash32_check_prot(int prot, int rwx)
return ret;
}
-static void hash32_bat_size(CPUPPCState *env, target_ulong *blp, int *validp,
- target_ulong batu, target_ulong batl)
+static target_ulong hash32_bat_size(CPUPPCState *env,
+ target_ulong batu, target_ulong batl)
{
- target_ulong bl;
- int valid;
-
- bl = (batu & BATU32_BL) << 15;
- valid = 0;
- if (((msr_pr == 0) && (batu & BATU32_VS)) ||
- ((msr_pr != 0) && (batu & BATU32_VP))) {
- valid = 1;
+ if ((msr_pr && !(batu & BATU32_VP))
+ || (!msr_pr && !(batu & BATU32_VS))) {
+ return 0;
}
- *blp = bl;
- *validp = valid;
+
+ return BATU32_BEPI & ~((batu & BATU32_BL) << 15);
}
static int hash32_bat_prot(CPUPPCState *env,
@@ -145,18 +140,14 @@ static int hash32_bat_prot(CPUPPCState *env,
return prot;
}
-static void hash32_bat_601_size(CPUPPCState *env, target_ulong *blp, int
*validp,
+static target_ulong hash32_bat_601_size(CPUPPCState *env,
target_ulong batu, target_ulong batl)
{
- target_ulong bl;
- int valid;
-
- bl = (batl & BATL32_601_BL) << 17;
- LOG_BATS("b %02x ==> bl " TARGET_FMT_lx " msk " TARGET_FMT_lx "\n",
- (uint8_t)(batl & BATL32_601_BL), bl, ~bl);
- valid = !!(batl & BATL32_601_V);
- *blp = bl;
- *validp = valid;
+ if (!(batl & BATL32_601_V)) {
+ return 0;
+ }
+
+ return BATU32_BEPI & ~((batl & BATL32_601_BL) << 17);
}
static int hash32_bat_601_prot(CPUPPCState *env,
@@ -177,8 +168,7 @@ static int ppc_hash32_get_bat(CPUPPCState *env, struct
mmu_ctx_hash32 *ctx,
target_ulong virtual, int rwx)
{
target_ulong *BATlt, *BATut;
- target_ulong BEPIl, BEPIu, bl;
- int i, valid, prot;
+ int i, prot;
int ret = -1;
LOG_BATS("%s: %cBAT v " TARGET_FMT_lx "\n", __func__,
@@ -193,37 +183,33 @@ static int ppc_hash32_get_bat(CPUPPCState *env, struct
mmu_ctx_hash32 *ctx,
for (i = 0; i < env->nb_BATs; i++) {
target_ulong batu = BATut[i];
target_ulong batl = BATlt[i];
+ target_ulong mask;
- BEPIu = batu & BATU32_BEPIU;
- BEPIl = batu & BATU32_BEPIL;
if (unlikely(env->mmu_model == POWERPC_MMU_601)) {
- hash32_bat_601_size(env, &bl, &valid, batu, batl);
+ mask = hash32_bat_601_size(env, batu, batl);
prot = hash32_bat_601_prot(env, batu, batl);
} else {
- hash32_bat_size(env, &bl, &valid, batu, batl);
+ mask = hash32_bat_size(env, batu, batl);
prot = hash32_bat_prot(env, batu, batl);
}
LOG_BATS("%s: %cBAT%d v " TARGET_FMT_lx " BATu " TARGET_FMT_lx
" BATl " TARGET_FMT_lx "\n", __func__,
type == ACCESS_CODE ? 'I' : 'D', i, virtual, batu, batl);
- if ((virtual & BATU32_BEPIU) == BEPIu &&
- ((virtual & BATU32_BEPIL) & ~bl) == BEPIl) {
+
+ if (mask && ((virtual & mask) == (batu & BATU32_BEPI))) {
/* BAT matches */
- if (valid != 0) {
- /* Get physical address */
- ctx->raddr = (batl & BATL32_BRPNU) |
- ((virtual & BATU32_BEPIL & bl) | (batl & BATL32_BRPNL)) |
- (virtual & 0x0001F000);
- /* Compute access rights */
- ctx->prot = prot;
- ret = ppc_hash32_check_prot(ctx->prot, rwx);
- if (ret == 0) {
- LOG_BATS("BAT %d match: r " TARGET_FMT_plx " prot=%c%c\n",
- i, ctx->raddr, ctx->prot & PAGE_READ ? 'R' : '-',
- ctx->prot & PAGE_WRITE ? 'W' : '-');
- }
- break;
+ /* Get physical address */
+ ctx->raddr = (batl & mask) | (virtual & ~mask);
+ ctx->raddr &= TARGET_PAGE_MASK;
+ /* Compute access rights */
+ ctx->prot = prot;
+ ret = ppc_hash32_check_prot(ctx->prot, rwx);
+ if (ret == 0) {
+ LOG_BATS("BAT %d match: r " TARGET_FMT_plx " prot=%c%c\n",
+ i, ctx->raddr, ctx->prot & PAGE_READ ? 'R' : '-',
+ ctx->prot & PAGE_WRITE ? 'W' : '-');
}
+ break;
}
}
if (ret < 0) {
diff --git a/target-ppc/mmu-hash32.h b/target-ppc/mmu-hash32.h
index f990edc..884786b 100644
--- a/target-ppc/mmu-hash32.h
+++ b/target-ppc/mmu-hash32.h
@@ -22,16 +22,12 @@ int ppc_hash32_handle_mmu_fault(CPUPPCState *env,
target_ulong address, int rw,
* Block Address Translation (BAT) definitions
*/
-#define BATU32_BEPIU 0xf0000000
-#define BATU32_BEPIL 0x0ffe0000
#define BATU32_BEPI 0xfffe0000
#define BATU32_BL 0x00001ffc
#define BATU32_VS 0x00000002
#define BATU32_VP 0x00000001
-#define BATL32_BRPNU 0xf0000000
-#define BATL32_BRPNL 0x0ffe0000
#define BATL32_BRPN 0xfffe0000
#define BATL32_WIMG 0x00000078
#define BATL32_PP 0x00000003
--
1.7.10.4
- [Qemu-ppc] [0/48] target-ppc: MMU implementation cleanup for hash MMUs, David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 02/48] target-ppc: Trivial cleanups in mmu_helper.c, David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 46/48] target-ppc: Split user only code out of mmu_helper.c, David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 29/48] mmu-hash64: Clean up ppc_hash64_htab_lookup(), David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 25/48] mmu-hash*: Don't keep looking for PTEs after we find a match, David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 23/48] mmu-hash32: Split direct store segment handling into a helper, David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 18/48] mmu-hash*: Reduce use of access_type, David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 28/48] mmu-hash*: Remove permission checking from find_pte{32, 64}(), David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 01/48] target-ppc: Remove vestigial PowerPC 620 support, David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 33/48] mmu-hash32: Clean up BAT matching logic,
David Gibson <=
- [Qemu-ppc] [PATCH 37/48] mmu-hash32: Remove nx from context structure, David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 22/48] mmu-hash32: Split out handling of direct store segments, David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 40/48] mmu-hash*: Clean up PTE flags update, David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 34/48] mmu-hash32: Cleanup BAT lookup, David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 19/48] mmu-hash64: Remove nx from mmu_ctx_hash64, David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 42/48] mmu-hash*: Correctly mask RPN from hash PTE, David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 16/48] mmu-hash*: Add header file for definitions, David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 05/48] target-ppc: Disentangle pte_check(), David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 20/48] mmu-hash*: Remove eaddr field from mmu_ctx_hash{32, 64}, David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 43/48] mmu-hash*: Don't use full ppc_hash{32, 64}_translate() path for get_phys_page_debug(), David Gibson, 2013/03/12