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[Qemu-ppc] [PATCH 5/7] target-ppc: Add more stubs for POWER7 PMU registe
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PATCH 5/7] target-ppc: Add more stubs for POWER7 PMU registers |
Date: |
Mon, 8 Apr 2013 15:08:20 +1000 |
In addition to the performance monitor registers found on nearly all
6xx chips, the POWER7 has two additional counters (PMC5 & PMC6) and an
extra control register (MMCRA). This patch adds stub support for them to
qemu - the registers won't do anything, but with this change won't cause
illegal instruction traps accessing them. They're also registered with
their ONE_REG ids, so their value will be kept in sync with KVM where
appropriate.
Signed-off-by: David Gibson <address@hidden>
---
target-ppc/cpu.h | 1 +
target-ppc/translate_init.c | 12 ++++++++++++
2 files changed, 13 insertions(+)
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 42c36e2..94bd36b 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1446,6 +1446,7 @@ static inline void cpu_clone_regs(CPUPPCState *env,
target_ulong newsp)
#define SPR_PERF2 (0x302)
#define SPR_RCPU_MI_RBA2 (0x302)
#define SPR_MPC_MI_AP (0x302)
+#define SPR_MMCRA (0x302)
#define SPR_PERF3 (0x303)
#define SPR_RCPU_MI_RBA3 (0x303)
#define SPR_MPC_MI_EPN (0x303)
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 6e20b55..71e434a 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -6962,6 +6962,18 @@ static void init_proc_POWER7 (CPUPPCState *env)
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
KVM_REG_PPC_DSCR, 0x00000000);
+ spr_register_kvm(env, SPR_MMCRA, "SPR_MMCRA",
+ SPR_NOACCESS, SPR_NOACCESS,
+ &spr_read_generic, &spr_write_generic,
+ KVM_REG_PPC_MMCRA, 0x00000000);
+ spr_register_kvm(env, SPR_PMC5, "SPR_PMC5",
+ SPR_NOACCESS, SPR_NOACCESS,
+ &spr_read_generic, &spr_write_generic,
+ KVM_REG_PPC_PMC5, 0x00000000);
+ spr_register_kvm(env, SPR_PMC6, "SPR_PMC6",
+ SPR_NOACCESS, SPR_NOACCESS,
+ &spr_read_generic, &spr_write_generic,
+ KVM_REG_PPC_PMC6, 0x00000000);
#endif /* !CONFIG_USER_ONLY */
/* Memory management */
/* XXX : not implemented */
--
1.7.10.4
- [Qemu-ppc] [0/7] Pending pseries updates, David Gibson, 2013/04/08
- [Qemu-ppc] [PATCH 3/7] pseries: Fix incorrect calculation of RMA size in certain configurations, David Gibson, 2013/04/08
- [Qemu-ppc] [PATCH 2/7] pseries: Generate device paths for VIO devices, David Gibson, 2013/04/08
- [Qemu-ppc] [PATCH 4/7] pseries: Fixes and enhancements to L1 cache properties, David Gibson, 2013/04/08
- [Qemu-ppc] [PATCH 5/7] target-ppc: Add more stubs for POWER7 PMU registers,
David Gibson <=
- [Qemu-ppc] [PATCH 6/7] pseries: Fix some small errors in XICS logic, David Gibson, 2013/04/08
- [Qemu-ppc] [PATCH 7/7] target-ppc: Synchronize VPA state with KVM, David Gibson, 2013/04/08
- [Qemu-ppc] [PATCH 1/7] pseries: Convert VIO code to QOM style type safe(ish) casts, David Gibson, 2013/04/08
- Re: [Qemu-ppc] [0/7] Pending pseries updates, Alexander Graf, 2013/04/19