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Re: [Qemu-ppc] [Qemu-devel] [PATCH qom-cpu 25/59] cpu: Change qemu_init_
From: |
li guang |
Subject: |
Re: [Qemu-ppc] [Qemu-devel] [PATCH qom-cpu 25/59] cpu: Change qemu_init_vcpu() argument to CPUState |
Date: |
Tue, 11 Jun 2013 10:39:25 +0800 |
在 2013-06-09日的 21:12 +0200,Andreas Färber写道:
> This allows to move the call to CPUState's realizefn.
> Therefore move the stub into libqemustub.a.
>
> Signed-off-by: Andreas Färber <address@hidden>
[...]
> static void alpha_cpu_realizefn(DeviceState *dev, Error **errp)
> {
> - AlphaCPU *cpu = ALPHA_CPU(dev);
> AlphaCPUClass *acc = ALPHA_CPU_GET_CLASS(dev);
>
> - qemu_init_vcpu(&cpu->env);
> -
> acc->parent_realize(dev, errp);
> }
>
> diff --git a/target-arm/cpu.c b/target-arm/cpu.c
> index a40290c..88ee61b 100644
> --- a/target-arm/cpu.c
> +++ b/target-arm/cpu.c
> @@ -205,7 +205,6 @@ static void arm_cpu_realizefn(DeviceState *dev, Error
> **errp)
> arm_cpu_register_gdb_regs_for_features(cpu);
>
> cpu_reset(CPU(cpu));
can this and following 'cpu_reset' also be moved to
'cpu_common_realizefn' like 'qemu_init_vcpu'?
> - qemu_init_vcpu(env);
>
> acc->parent_realize(dev, errp);
> }
> diff --git a/target-cris/cpu.c b/target-cris/cpu.c
> index 82271f7..6a3bdf0 100644
> --- a/target-cris/cpu.c
> +++ b/target-cris/cpu.c
> @@ -139,7 +139,6 @@ static void cris_cpu_realizefn(DeviceState *dev, Error
> **errp)
> CRISCPUClass *ccc = CRIS_CPU_GET_CLASS(dev);
>
> cpu_reset(CPU(cpu));
> - qemu_init_vcpu(&cpu->env);
>
> ccc->parent_realize(dev, errp);
> }
> diff --git a/target-i386/cpu.c b/target-i386/cpu.c
> index 48c062f..b7416fe 100644
> --- a/target-i386/cpu.c
> +++ b/target-i386/cpu.c
> @@ -2392,7 +2392,6 @@ static void x86_cpu_realizefn(DeviceState *dev, Error
> **errp)
> #endif
>
> mce_init(cpu);
> - qemu_init_vcpu(&cpu->env);
>
> x86_cpu_apic_realize(cpu, &local_err);
> if (local_err != NULL) {
> diff --git a/target-lm32/cpu.c b/target-lm32/cpu.c
> index 2366152..02f8436 100644
> --- a/target-lm32/cpu.c
> +++ b/target-lm32/cpu.c
> @@ -49,8 +49,6 @@ static void lm32_cpu_realizefn(DeviceState *dev, Error
> **errp)
>
> cpu_reset(CPU(cpu));
>
> - qemu_init_vcpu(&cpu->env);
> -
> lcc->parent_realize(dev, errp);
> }
>
> diff --git a/target-m68k/cpu.c b/target-m68k/cpu.c
> index d501027..799869f 100644
> --- a/target-m68k/cpu.c
> +++ b/target-m68k/cpu.c
> @@ -147,7 +147,6 @@ static void m68k_cpu_realizefn(DeviceState *dev, Error
> **errp)
> m68k_cpu_init_gdb(cpu);
>
> cpu_reset(CPU(cpu));
> - qemu_init_vcpu(&cpu->env);
>
> mcc->parent_realize(dev, errp);
> }
> diff --git a/target-microblaze/cpu.c b/target-microblaze/cpu.c
> index e8104d1..b9a097c 100644
> --- a/target-microblaze/cpu.c
> +++ b/target-microblaze/cpu.c
> @@ -92,7 +92,6 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp)
> MicroBlazeCPUClass *mcc = MICROBLAZE_CPU_GET_CLASS(dev);
>
> cpu_reset(CPU(cpu));
> - qemu_init_vcpu(&cpu->env);
>
> mcc->parent_realize(dev, errp);
> }
> diff --git a/target-mips/cpu.c b/target-mips/cpu.c
> index b685d39..0fdc316 100644
> --- a/target-mips/cpu.c
> +++ b/target-mips/cpu.c
> @@ -48,7 +48,6 @@ static void mips_cpu_realizefn(DeviceState *dev, Error
> **errp)
> MIPSCPUClass *mcc = MIPS_CPU_GET_CLASS(dev);
>
> cpu_reset(CPU(cpu));
> - qemu_init_vcpu(&cpu->env);
>
> mcc->parent_realize(dev, errp);
> }
> diff --git a/target-moxie/cpu.c b/target-moxie/cpu.c
> index 3c3932c..f3c0d22 100644
> --- a/target-moxie/cpu.c
> +++ b/target-moxie/cpu.c
> @@ -44,12 +44,11 @@ static void moxie_cpu_reset(CPUState *s)
> static void moxie_cpu_realizefn(DeviceState *dev, Error **errp)
> {
> MoxieCPU *cpu = MOXIE_CPU(dev);
> - MoxieCPUClass *occ = MOXIE_CPU_GET_CLASS(dev);
> + MoxieCPUClass *mcc = MOXIE_CPU_GET_CLASS(dev);
>
> - qemu_init_vcpu(&cpu->env);
> cpu_reset(CPU(cpu));
>
> - occ->parent_realize(dev, errp);
> + mcc->parent_realize(dev, errp);
> }
>
> static void moxie_cpu_initfn(Object *obj)
> diff --git a/target-openrisc/cpu.c b/target-openrisc/cpu.c
> index 82bee2a..dff357f 100644
> --- a/target-openrisc/cpu.c
> +++ b/target-openrisc/cpu.c
> @@ -67,7 +67,6 @@ static void openrisc_cpu_realizefn(DeviceState *dev, Error
> **errp)
> OpenRISCCPU *cpu = OPENRISC_CPU(dev);
> OpenRISCCPUClass *occ = OPENRISC_CPU_GET_CLASS(dev);
>
> - qemu_init_vcpu(&cpu->env);
> cpu_reset(CPU(cpu));
>
> occ->parent_realize(dev, errp);
> diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
> index 0edb336..fa5e09f 100644
> --- a/target-ppc/translate_init.c
> +++ b/target-ppc/translate_init.c
> @@ -7752,8 +7752,6 @@ static void ppc_cpu_realizefn(DeviceState *dev, Error
> **errp)
> 34, "power-spe.xml", 0);
> }
>
> - qemu_init_vcpu(env);
> -
> pcc->parent_realize(dev, errp);
>
> #if defined(PPC_DUMP_CPU)
> diff --git a/target-s390x/cpu.c b/target-s390x/cpu.c
> index 8ec2f9b..c3697cd 100644
> --- a/target-s390x/cpu.c
> +++ b/target-s390x/cpu.c
> @@ -102,7 +102,6 @@ static void s390_cpu_realizefn(DeviceState *dev, Error
> **errp)
> S390CPU *cpu = S390_CPU(dev);
> S390CPUClass *scc = S390_CPU_GET_CLASS(dev);
>
> - qemu_init_vcpu(&cpu->env);
> cpu_reset(CPU(cpu));
>
> scc->parent_realize(dev, errp);
> diff --git a/target-sh4/cpu.c b/target-sh4/cpu.c
> index a7d5213..e739156 100644
> --- a/target-sh4/cpu.c
> +++ b/target-sh4/cpu.c
> @@ -234,7 +234,6 @@ static void superh_cpu_realizefn(DeviceState *dev, Error
> **errp)
> SuperHCPUClass *scc = SUPERH_CPU_GET_CLASS(dev);
>
> cpu_reset(CPU(cpu));
> - qemu_init_vcpu(&cpu->env);
>
> scc->parent_realize(dev, errp);
> }
> diff --git a/target-sparc/cpu.c b/target-sparc/cpu.c
> index 79e391f..0fd84cf 100644
> --- a/target-sparc/cpu.c
> +++ b/target-sparc/cpu.c
> @@ -730,11 +730,8 @@ void sparc_cpu_dump_state(CPUState *cs, FILE *f,
> fprintf_function cpu_fprintf,
>
> static void sparc_cpu_realizefn(DeviceState *dev, Error **errp)
> {
> - SPARCCPU *cpu = SPARC_CPU(dev);
> SPARCCPUClass *scc = SPARC_CPU_GET_CLASS(dev);
>
> - qemu_init_vcpu(&cpu->env);
> -
> scc->parent_realize(dev, errp);
> }
>
> diff --git a/target-unicore32/cpu.c b/target-unicore32/cpu.c
> index 1a97e6b..6572f01 100644
> --- a/target-unicore32/cpu.c
> +++ b/target-unicore32/cpu.c
> @@ -83,11 +83,8 @@ static const UniCore32CPUInfo uc32_cpus[] = {
>
> static void uc32_cpu_realizefn(DeviceState *dev, Error **errp)
> {
> - UniCore32CPU *cpu = UNICORE32_CPU(dev);
> UniCore32CPUClass *ucc = UNICORE32_CPU_GET_CLASS(dev);
>
> - qemu_init_vcpu(&cpu->env);
> -
> ucc->parent_realize(dev, errp);
> }
>
> diff --git a/target-xtensa/cpu.c b/target-xtensa/cpu.c
> index b5df321..0488984 100644
> --- a/target-xtensa/cpu.c
> +++ b/target-xtensa/cpu.c
> @@ -59,11 +59,8 @@ static void xtensa_cpu_reset(CPUState *s)
>
> static void xtensa_cpu_realizefn(DeviceState *dev, Error **errp)
> {
> - XtensaCPU *cpu = XTENSA_CPU(dev);
> XtensaCPUClass *xcc = XTENSA_CPU_GET_CLASS(dev);
>
> - qemu_init_vcpu(&cpu->env);
> -
> xcc->parent_realize(dev, errp);
> }
>