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Re: [Qemu-ppc] [Qemu-devel] [V2 PATCH 11/18] softfloat: Fix float64_to_u
From: |
Peter Maydell |
Subject: |
Re: [Qemu-ppc] [Qemu-devel] [V2 PATCH 11/18] softfloat: Fix float64_to_uint32 |
Date: |
Wed, 18 Dec 2013 18:03:45 +0000 |
On 18 December 2013 17:32, Tom Musta <address@hidden> wrote:
> On 12/17/2013 11:45 AM, Peter Maydell wrote:
>> I'm partway through fixing this bug in an implementation of
>> float*_to_uint16 which the ARM AArch64 needs. I think the
>> cleanest approach to this looks like this:
>>
>> uint32 float64_to_uint32( float64 a STATUS_PARAM )
>> {
>> int64_t v;
>> uint32 res;
>> int old_exc_flags = get_float_exception_flags(status);
>>
>> v = float64_to_uint64(a STATUS_VAR);
>> if (v > 0xffffffff) {
>> res = 0xffffffff;
>> } else {
>> return v;
>> }
>> set_float_exception_flags(old_exc_flags);
>> float_raise(float_flag_invalid STATUS_VAR);
>> return res;
>> }
>>
>> thanks
>> -- PMM
>>
>
> This seems to assume that the only case where flags could be set in
> float64_to_uint32 is the case where a large result is returned. Is
> this really the case?
No, all it's assuming is that if we have the out-of-range
case then the only flag that should be set is Invalid.
In the "result is correct" case we return v and don't
modify the flags from what float64_to_uint64() has set.
Do you think there are flags that should be allowed
to be set by the conversion operation even if it is signaling
Invalid because of out of range input? IEEE754-2008 section 7.1
says "An invocation of [any operation except directly modifying
the flags] might raise at most two status flags, overflow
with inexact or underflow with inexact". That is, any operation
might (1) raise no flags (2) raise just one flag (3) raise
Overflow+Inexact (4) raise Underflow+Inexact.
[QEMU/softfloat don't suport alternate exception handling
so we can ignore the standard's verbiage about that.]
There is also the softfloat-specific float_flag_input_denormal,
but I think that is also fine because it will only be set by the
operation if we're squashing input denormals to zero, in
which case the float-to-int conversion must always successfully
return zero (because we squashed the input to plus or minus
zero).
This is a bit complicated though, so maybe I missed a case?
thanks
-- PMM
- [Qemu-ppc] [V2 PATCH 06/18] target-ppc: Add ISA2.06 lbarx, lharx Instructions, (continued)
- [Qemu-ppc] [V2 PATCH 06/18] target-ppc: Add ISA2.06 lbarx, lharx Instructions, Tom Musta, 2013/12/11
- [Qemu-ppc] [V2 PATCH 08/18] target-ppc: Add ISA2.06 Float to Integer Instructions, Tom Musta, 2013/12/11
- [Qemu-ppc] [V2 PATCH 09/18] softfloat: Fix Handling of Small Negatives in float64_to_uint64, Tom Musta, 2013/12/11
- [Qemu-ppc] [V2 PATCH 10/18] softfloat: Fix float64_to_uint64_round_to_zero, Tom Musta, 2013/12/11
- [Qemu-ppc] [V2 PATCH 11/18] softfloat: Fix float64_to_uint32, Tom Musta, 2013/12/11
- Re: [Qemu-ppc] [Qemu-devel] [V2 PATCH 11/18] softfloat: Fix float64_to_uint32, Peter Maydell, 2013/12/11
- Re: [Qemu-ppc] [Qemu-devel] [V2 PATCH 11/18] softfloat: Fix float64_to_uint32, Tom Musta, 2013/12/11
- Re: [Qemu-ppc] [Qemu-devel] [V2 PATCH 11/18] softfloat: Fix float64_to_uint32, Peter Maydell, 2013/12/17
- Re: [Qemu-ppc] [Qemu-devel] [V2 PATCH 11/18] softfloat: Fix float64_to_uint32, Peter Maydell, 2013/12/17
- Re: [Qemu-ppc] [Qemu-devel] [V2 PATCH 11/18] softfloat: Fix float64_to_uint32, Tom Musta, 2013/12/18
- Re: [Qemu-ppc] [Qemu-devel] [V2 PATCH 11/18] softfloat: Fix float64_to_uint32,
Peter Maydell <=
- Re: [Qemu-ppc] [Qemu-devel] [V2 PATCH 11/18] softfloat: Fix float64_to_uint32, Tom Musta, 2013/12/18
[Qemu-ppc] [V2 PATCH 12/18] softfloat: Fix float64_to_uint32_round_to_zero, Tom Musta, 2013/12/11
[Qemu-ppc] [V2 PATCH 13/18] target-ppc: Add ISA 2.06 fcfid[u][s] Instructions, Tom Musta, 2013/12/11
[Qemu-ppc] [V2 PATCH 14/18] target-ppc: Fix and enable fri[mnpz], Tom Musta, 2013/12/11
[Qemu-ppc] [V2 PATCH 15/18] target-ppc: Add ISA 2.06 ftdiv Instruction, Tom Musta, 2013/12/11
[Qemu-ppc] [V2 PATCH 18/18] target-ppc: Add ISA2.06 lfiwzx Instruction, Tom Musta, 2013/12/11
Re: [Qemu-ppc] [Qemu-devel] [V2 PATCH 00/18] target-ppc: Base ISA V2.06 for Power7/Power8, Peter Maydell, 2013/12/11