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Re: [Qemu-ppc] [Qemu-devel] [PATCH 01/18] target-ppc: Add Flag for Power
From: |
Scott Wood |
Subject: |
Re: [Qemu-ppc] [Qemu-devel] [PATCH 01/18] target-ppc: Add Flag for Power ISA V2.06 |
Date: |
Wed, 18 Dec 2013 16:02:37 -0600 |
On Mon, 2013-12-09 at 09:46 -0600, Tom Musta wrote:
> This patch adds a flag for base instruction additions to Power ISA
> 2.06B. The flag will be used to identify/select basic Book I and
> Book II instructions that were newly added in that revision of the
> architecture. The flag will not be used for VSX or Altivec.
>
> Signed-off-by: Tom Musta <address@hidden>
> ---
> target-ppc/cpu.h | 4 +++-
> target-ppc/translate_init.c | 6 ++++--
> 2 files changed, 7 insertions(+), 3 deletions(-)
>
> diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
> index 0abc848..fe3aace 100644
> --- a/target-ppc/cpu.h
> +++ b/target-ppc/cpu.h
> @@ -1877,9 +1877,11 @@ enum {
> PPC2_ISA205 = 0x0000000000000020ULL,
> /* VSX additions in ISA 2.07
> */
> PPC2_VSX207 = 0x0000000000000040ULL,
> + /* Book I 2.06B PowerPC specification (base instructions)
> */
> + PPC2_ISA206 = 0x0000000000000080ULL,
>
> #define PPC_TCG_INSNS2 (PPC2_BOOKE206 | PPC2_VSX | PPC2_PRCNTL | PPC2_DBRX |
> \
> - PPC2_ISA205 | PPC2_VSX207)
> + PPC2_ISA205 | PPC2_VSX207 | PPC2_ISA206)
> };
>
>
> /*****************************************************************************/
> diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
> index e14ab63..491e56c 100644
> --- a/target-ppc/translate_init.c
> +++ b/target-ppc/translate_init.c
> @@ -7234,7 +7234,8 @@ POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data)
> PPC_64B | PPC_ALTIVEC |
> PPC_SEGMENT_64B | PPC_SLBI |
> PPC_POPCNTB | PPC_POPCNTWD;
> - pcc->insns_flags2 = PPC2_VSX | PPC2_DFP | PPC2_DBRX | PPC2_ISA205;
> + pcc->insns_flags2 = PPC2_VSX | PPC2_DFP | PPC2_DBRX | PPC2_ISA205 |
> + PPC2_ISA206;
> pcc->msr_mask = 0x800000000284FF37ULL;
> pcc->mmu_model = POWERPC_MMU_2_06;
> #if defined(CONFIG_SOFTMMU)
> @@ -7270,7 +7271,8 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data)
> PPC_64B | PPC_ALTIVEC |
> PPC_SEGMENT_64B | PPC_SLBI |
> PPC_POPCNTB | PPC_POPCNTWD;
> - pcc->insns_flags2 = PPC2_VSX | PPC2_VSX207 | PPC2_DFP | PPC2_DBRX;
> + pcc->insns_flags2 = PPC2_VSX | PPC2_VSX207 | PPC2_DFP | PPC2_DBRX |
> + PPC2_ISA206;
> pcc->msr_mask = 0x800000000284FF36ULL;
> pcc->mmu_model = POWERPC_MMU_2_06;
> #if defined(CONFIG_SOFTMMU)
e500mc/e5500 are also ISA 2.06 (minus some of these new instructions,
but not all of them -- better to emulate instructions that don't exist
than to not emulate instructions that do exist).
-Scott
- [Qemu-ppc] [PATCH 00/18] target-ppc: Base ISA V2.06 for Power7/Power8, Tom Musta, 2013/12/09
- [Qemu-ppc] [PATCH 01/18] target-ppc: Add Flag for Power ISA V2.06, Tom Musta, 2013/12/09
- Re: [Qemu-ppc] [Qemu-devel] [PATCH 01/18] target-ppc: Add Flag for Power ISA V2.06,
Scott Wood <=
- Re: [Qemu-ppc] [Qemu-devel] [PATCH 01/18] target-ppc: Add Flag for Power ISA V2.06, Alexander Graf, 2013/12/18
- Re: [Qemu-ppc] [Qemu-devel] [PATCH 01/18] target-ppc: Add Flag for Power ISA V2.06, Scott Wood, 2013/12/18
- Re: [Qemu-ppc] [Qemu-devel] [PATCH 01/18] target-ppc: Add Flag for Power ISA V2.06, Alexander Graf, 2013/12/18
- Re: [Qemu-ppc] [Qemu-devel] [PATCH 01/18] target-ppc: Add Flag for Power ISA V2.06, Tom Musta, 2013/12/19
- Re: [Qemu-ppc] [Qemu-devel] [PATCH 01/18] target-ppc: Add Flag for Power ISA V2.06, Scott Wood, 2013/12/19
[Qemu-ppc] [PATCH 02/18] target-ppc: Add ISA2.06 bpermd Instruction, Tom Musta, 2013/12/09
[Qemu-ppc] [PATCH 03/18] target-ppc: Add ISA2.06 divdeu[o] Instructions, Tom Musta, 2013/12/09