Re: [Qemu-ppc] Specific use of lfs for loading int leads to wrong value in f register

[Tom Musta]

On 9/12/2014 2:19 PM, Pierre Mallard wrote:
> So the clear goal of lfs and fcfid is to convert an int32 to a float. While 
> the documentation of Xilinx 
> (http://www.xilinx.com/support/documentation/ip_documentation/apu_fpu_virtex5.pdf)
>  is quite explicit on how they shall act in single precision mode,
> (mode which is defined by hardware design configuration), the test leads to 0 
> also on their platform (maybe the low 32 bit of your result).
> 

Aahhh .... so skimming the document, I see that this FPU supports a single 
precision option or mode in which the floating point registers are only 32 bits 
wide.  And the fcfid instruction is really an fcfiw.  In this light, I now 
understand the instruction
sequence for the cast.

But this is very different from the standard Power ISA, which is what QEMU 
implements.