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Re: [Qemu-ppc] Status of mac99?
From: |
ardi |
Subject: |
Re: [Qemu-ppc] Status of mac99? |
Date: |
Sat, 7 Mar 2015 10:56:52 +0100 |
On 3/7/15, Alexander Graf <address@hidden> wrote:
>
>
> On 06.03.15 23:05, ardi wrote:
>> On 3/6/15, Alexander Graf <address@hidden> wrote:
>>>
>>> No :). For G5 support we really should implement a U3 or U4 chipset.
>>
>> Can you point me towards how is this planned to be done, so that I can
>> tell if I can help advancing this? Reading the uninorth source code
>> from mac99 I see definitions for U3 and/or U4, so I don't know if the
>> plan is to integrate it with uninorth or to write new source files.
>
> Phew, those were mostly messups on my side so far. I think the cleanest
> way to go with this would be to just start from scratch.
>
>> Also, what's already done for U3/U4, and what's still to be done?
>
> Uh, pretty much nothing has been done so far :). Only enough to make
> Linux happy enough to boot a VM with a semi-broken U1-that-exposes-as-U3.
Alex, I'm afraid starting a U3 implementation from scratch is well
beyond my chipset knowledge :-( But, however, I just had an idea that
(I believe) would work for my purposes of debugging G5 code on an
emulated Tiger machine: would it be possible to boot mac99 with a G4
CPU that identifies itself as G4 but that can execute (32 bit)
specific G5 instructions?
AFAIK, Tiger doesn't check whether an executable has instructions for
a higher processor (at least if I do 'file myG5executable' on
Terminal, it just tells if it's ppc or ppc64, but not the minimum
instruction set).
If this is true and I can somehow boot mac99 with a G4 that
understands G5 code, maybe it would work for my purposes.
Thanks,
ardi