[Qemu-ppc] [PATCH qemu v7 07/14] spapr_iommu: Add root memory region

[Alexey Kardashevskiy]

We are going to have multiple DMA windows at different offsets on
a PCI bus. For the sake of migration, we will have as many TCE table
objects pre-created as many windows supported.
So we need a way to map windows dynamically onto a PCI bus
when migration of a table is completed but at this stage a TCE table
object does not have access to a PHB to ask it to map a DMA window
backed by just migrated TCE table.

This adds a "root" memory region (UINT64_MAX long) to the TCE object.
This new region is mapped on a PCI bus with enabled overlapping as
there will be one root MR per TCE table, each of them mapped at 0.
The actual IOMMU memory region is a subregion of the root region and
a TCE table enables/disables this subregion and maps it at
the specific offset inside the root MR which is 1:1 mapping of
a PCI address space.

Signed-off-by: Alexey Kardashevskiy <address@hidden>
---
 hw/ppc/spapr_iommu.c   | 9 ++++++++-
 hw/ppc/spapr_pci.c     | 2 +-
 include/hw/ppc/spapr.h | 2 +-
 3 files changed, 10 insertions(+), 3 deletions(-)

diff --git a/hw/ppc/spapr_iommu.c b/hw/ppc/spapr_iommu.c
index a3f2b83..245534f 100644
--- a/hw/ppc/spapr_iommu.c
+++ b/hw/ppc/spapr_iommu.c
@@ -150,6 +150,8 @@ sPAPRTCETable *spapr_tce_new_table(DeviceState *owner, 
uint32_t liobn)
     tcet->liobn = liobn;
 
     snprintf(tmp, sizeof(tmp), "tce-table-%x", liobn);
+    memory_region_init(&tcet->root, OBJECT(tcet), tmp, UINT64_MAX);
+
     object_property_add_child(OBJECT(owner), tmp, OBJECT(tcet), NULL);
 
     object_property_set_bool(OBJECT(tcet), true, "realized", NULL);
@@ -183,6 +185,8 @@ static void spapr_tce_table_do_enable(sPAPRTCETable *tcet)
                              "iommu-spapr",
                              (uint64_t)tcet->nb_table << tcet->page_shift);
 
+    memory_region_add_subregion(&tcet->root, tcet->bus_offset, &tcet->iommu);
+
     tcet->enabled = true;
 }
 
@@ -208,6 +212,8 @@ void spapr_tce_table_disable(sPAPRTCETable *tcet)
         return;
     }
 
+    memory_region_del_subregion(&tcet->root, &tcet->iommu);
+
     if (!kvm_enabled() ||
         (kvmppc_remove_spapr_tce(tcet->table, tcet->fd,
                                  tcet->nb_table) != 0)) {
@@ -215,6 +221,7 @@ void spapr_tce_table_disable(sPAPRTCETable *tcet)
         g_free(tcet->table);
     }
     tcet->table = NULL;
+    object_unref(OBJECT(&tcet->iommu));
     tcet->enabled = false;
     tcet->bus_offset = 0;
     tcet->page_shift = 0;
@@ -233,7 +240,7 @@ static void spapr_tce_table_unrealize(DeviceState *dev, 
Error **errp)
 
 MemoryRegion *spapr_tce_get_iommu(sPAPRTCETable *tcet)
 {
-    return &tcet->iommu;
+    return &tcet->root;
 }
 
 static void spapr_tce_reset(DeviceState *dev)
diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
index c3410b8..664687c 100644
--- a/hw/ppc/spapr_pci.c
+++ b/hw/ppc/spapr_pci.c
@@ -895,7 +895,7 @@ static void spapr_phb_realize(DeviceState *dev, Error 
**errp)
         error_setg(errp, "failed to create TCE table");
         return;
     }
-    memory_region_add_subregion(&sphb->iommu_root, tcet->bus_offset,
+    memory_region_add_subregion(&sphb->iommu_root, 0,
                                 spapr_tce_get_iommu(tcet));
 
     sphb->msi = g_hash_table_new_full(g_int_hash, g_int_equal, g_free, g_free);
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
index 074d837..c8ac03f 100644
--- a/include/hw/ppc/spapr.h
+++ b/include/hw/ppc/spapr.h
@@ -507,7 +507,7 @@ struct sPAPRTCETable {
     bool bypass;
     bool vfio_accel;
     int fd;
-    MemoryRegion iommu;
+    MemoryRegion root, iommu;
     struct VIOsPAPRDevice *vdev; /* for @bypass migration compatibility only */
     QLIST_ENTRY(sPAPRTCETable) list;
 };
-- 
2.0.0