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[Qemu-ppc] [PULL 11/26] hw/ppc/spapr: Implement the h_set_xdabr hypercal
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 11/26] hw/ppc/spapr: Implement the h_set_xdabr hypercall |
Date: |
Thu, 18 Feb 2016 15:18:32 +1100 |
From: Thomas Huth <address@hidden>
The H_SET_XDABR hypercall is similar to H_SET_DABR, but also sets
the extended DABR (DABRX) register.
Signed-off-by: Thomas Huth <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/ppc/spapr_hcall.c | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index 0004ca5..6e9b6be 100644
--- a/hw/ppc/spapr_hcall.c
+++ b/hw/ppc/spapr_hcall.c
@@ -365,6 +365,27 @@ static target_ulong h_set_dabr(PowerPCCPU *cpu,
sPAPRMachineState *spapr,
return H_SUCCESS;
}
+static target_ulong h_set_xdabr(PowerPCCPU *cpu, sPAPRMachineState *spapr,
+ target_ulong opcode, target_ulong *args)
+{
+ target_ulong dabrx = args[1];
+
+ if (!has_spr(cpu, SPR_DABR) || !has_spr(cpu, SPR_DABRX)) {
+ return H_HARDWARE;
+ }
+
+ if ((dabrx & ~0xfULL) != 0 || (dabrx & H_DABRX_HYPERVISOR) != 0
+ || (dabrx & (H_DABRX_KERNEL | H_DABRX_USER)) == 0) {
+ return H_PARAMETER;
+ }
+
+ cpu_synchronize_state(CPU(cpu));
+ cpu->env.spr[SPR_DABRX] = dabrx;
+ cpu->env.spr[SPR_DABR] = args[0];
+
+ return H_SUCCESS;
+}
+
#define FLAGS_REGISTER_VPA 0x0000200000000000ULL
#define FLAGS_REGISTER_DTL 0x0000400000000000ULL
#define FLAGS_REGISTER_SLBSHADOW 0x0000600000000000ULL
@@ -1023,6 +1044,7 @@ static void hypercall_register_types(void)
/* processor register resource access h-calls */
spapr_register_hypercall(H_SET_SPRG0, h_set_sprg0);
spapr_register_hypercall(H_SET_DABR, h_set_dabr);
+ spapr_register_hypercall(H_SET_XDABR, h_set_xdabr);
spapr_register_hypercall(H_SET_MODE, h_set_mode);
/* "debugger" hcalls (also used by SLOF). Note: We do -not- differenciate
--
2.5.0
- [Qemu-ppc] [PULL 10/26] hw/ppc/spapr: Implement h_set_dabr, (continued)
- [Qemu-ppc] [PULL 10/26] hw/ppc/spapr: Implement h_set_dabr, David Gibson, 2016/02/17
- [Qemu-ppc] [PULL 23/26] cuda: remove GET_6805_ADDR command, David Gibson, 2016/02/17
- [Qemu-ppc] [PULL 03/26] target-ppc: Include missing MMU models for SDR1 in info registers, David Gibson, 2016/02/17
- [Qemu-ppc] [PULL 17/26] cuda: port POWERDOWN command to new framework, David Gibson, 2016/02/17
- [Qemu-ppc] [PULL 16/26] cuda: port SET_DEVICE_LIST command to new framework, David Gibson, 2016/02/17
- [Qemu-ppc] [PULL 12/26] cuda: add a framework to handle commands, David Gibson, 2016/02/17
- [Qemu-ppc] [PULL 25/26] pseries: Include missing pseries-2.5 compat properties in pseries-2.4, David Gibson, 2016/02/17
- [Qemu-ppc] [PULL 18/26] cuda: port RESET_SYSTEM command to new framework, David Gibson, 2016/02/17
- [Qemu-ppc] [PULL 24/26] cuda: remove CUDA_GET_SET_IIC/CUDA_COMBINED_FORMAT_IIC commands, David Gibson, 2016/02/17
- [Qemu-ppc] [PULL 02/26] target-ppc: Remove unused kvmppc_update_sdr1() stub, David Gibson, 2016/02/17
- [Qemu-ppc] [PULL 11/26] hw/ppc/spapr: Implement the h_set_xdabr hypercall,
David Gibson <=
- [Qemu-ppc] [PULL 21/26] cuda: port GET_TIME command to new framework, David Gibson, 2016/02/17
- [Qemu-ppc] [PULL 26/26] hw/ppc/spapr: Halt CPU when powering off via RTAS call, David Gibson, 2016/02/17
- [Qemu-ppc] [PULL 22/26] cuda: port SET_TIME command to new framework, David Gibson, 2016/02/17
- [Qemu-ppc] [PULL 20/26] cuda: port SET_POWER_MESSAGES command to new framework, David Gibson, 2016/02/17
- [Qemu-ppc] [PULL 06/26] pseries: Move hash page table allocation to reset time, David Gibson, 2016/02/17
- [Qemu-ppc] [PULL 14/26] cuda: port AUTOPOLL command to new framework, David Gibson, 2016/02/17
- [Qemu-ppc] [PULL 04/26] pseries: Simplify handling of the hash page table fd, David Gibson, 2016/02/17
- Re: [Qemu-ppc] [PULL 00/26] ppc-for-2.6 queue 20160218, Peter Maydell, 2016/02/18