[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-ppc] [PULL 18/23] target-ppc: gen_pause for instructions: yield, m
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 18/23] target-ppc: gen_pause for instructions: yield, mdoio, mdoom, miso |
Date: |
Fri, 1 Jul 2016 16:41:54 +1000 |
From: Aaron Larson <address@hidden>
Call gen_pause for all "or rx,rx,rx" encodings other nop. This
provides a reasonable implementation for yield, and a better
approximation for mdoio, mdoom, and miso. The choice to pause for all
encodings !=0 leverages the PowerISA admonition that the reserved
encodings might change program priority, providing a slight "future
proofing".
Signed-off-by: Aaron Larson <address@hidden>
Acked-by: Benjamin Herrenschmidt <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
target-ppc/translate.c | 15 ++++++++-------
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 49fe761..92030b6 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -1471,7 +1471,7 @@ static void gen_or(DisasContext *ctx)
} else if (unlikely(Rc(ctx->opcode) != 0)) {
gen_set_Rc0(ctx, cpu_gpr[rs]);
#if defined(TARGET_PPC64)
- } else {
+ } else if (rs != 0) { /* 0 is nop */
int prio = 0;
switch (rs) {
@@ -1514,7 +1514,6 @@ static void gen_or(DisasContext *ctx)
break;
#endif
default:
- /* nop */
break;
}
if (prio) {
@@ -1524,13 +1523,15 @@ static void gen_or(DisasContext *ctx)
tcg_gen_ori_tl(t0, t0, ((uint64_t)prio) << 50);
gen_store_spr(SPR_PPR, t0);
tcg_temp_free(t0);
- /* Pause us out of TCG otherwise spin loops with smt_low
- * eat too much CPU and the kernel hangs
- */
+ }
#if !defined(CONFIG_USER_ONLY)
- gen_pause(ctx);
+ /* Pause out of TCG otherwise spin loops with smt_low eat too much
+ * CPU and the kernel hangs. This applies to all encodings other
+ * than no-op, e.g., miso(rs=26), yield(27), mdoio(29), mdoom(30),
+ * and all currently undefined.
+ */
+ gen_pause(ctx);
#endif
- }
#endif
}
}
--
2.7.4
- Re: [Qemu-ppc] [PULL 05/23] ppc: Enforce setting MSR:EE, IR and DR when MSR:PR is set, (continued)
[Qemu-ppc] [PULL 03/23] ppc: Use a helper to filter writes to LPCR, David Gibson, 2016/07/01
[Qemu-ppc] [PULL 02/23] ppc: Update LPCR definitions, David Gibson, 2016/07/01
[Qemu-ppc] [PULL 21/23] spapr: do proper error propagation in spapr_cpu_core_realize_child(), David Gibson, 2016/07/01
[Qemu-ppc] [PULL 19/23] spapr: Restore support for 970MP and POWER8NVL CPU cores, David Gibson, 2016/07/01
[Qemu-ppc] [PULL 12/23] target-ppc: Eliminate redundant and incorrect function booke206_page_size_to_tlb, David Gibson, 2016/07/01
[Qemu-ppc] [PULL 01/23] ppc: Add a bunch of hypervisor SPRs to Book3s, David Gibson, 2016/07/01
[Qemu-ppc] [PULL 13/23] ppc: Fix 64K pages support in full emulation, David Gibson, 2016/07/01
[Qemu-ppc] [PULL 08/23] ppc: Print HSRR0/HSRR1 in "info registers", David Gibson, 2016/07/01
[Qemu-ppc] [PULL 18/23] target-ppc: gen_pause for instructions: yield, mdoio, mdoom, miso,
David Gibson <=
[Qemu-ppc] [PULL 09/23] hw/ppc/spapr: Add some missing hcall function set strings, David Gibson, 2016/07/01
[Qemu-ppc] [PULL 22/23] spapr: drop duplicate variable in spapr_core_release(), David Gibson, 2016/07/01
[Qemu-ppc] [PULL 23/23] qmp: fix spapr example of query-hotpluggable-cpus, David Gibson, 2016/07/01
[Qemu-ppc] [PULL 07/23] ppc: LPCR is a HV resource, David Gibson, 2016/07/01
[Qemu-ppc] [PULL 20/23] spapr: drop reference on child object during core realization, David Gibson, 2016/07/01
[Qemu-ppc] [PULL 04/23] ppc: Fix conditions for delivering external interrupts to a guest, David Gibson, 2016/07/01
[Qemu-ppc] [PULL 11/23] spapr: Restore support for older PowerPC CPU cores, David Gibson, 2016/07/01
[Qemu-ppc] [PULL 06/23] ppc: Initial HDEC support, David Gibson, 2016/07/01
[Qemu-ppc] [PULL 16/23] ppc/xics: Implement H_IPOLL using an accessor, David Gibson, 2016/07/01
[Qemu-ppc] [PULL 14/23] ppc/xics: Rename existing xics to xics_spapr, David Gibson, 2016/07/01