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[Qemu-ppc] [PATCH 30/32] ppc: Use a helper to generate "LE unsupported"
From: |
Benjamin Herrenschmidt |
Subject: |
[Qemu-ppc] [PATCH 30/32] ppc: Use a helper to generate "LE unsupported" alignment interrupts |
Date: |
Wed, 27 Jul 2016 08:21:24 +1000 |
Some operations aren't allowed in LE mode, use a helper rather than
open coding the exception generation.
Signed-off-by: Benjamin Herrenschmidt <address@hidden>
---
target-ppc/translate.c | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index fcff24a..df9a5bd 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -2212,6 +2212,12 @@ static inline void gen_check_align(DisasContext *ctx,
TCGv EA, int mask)
tcg_temp_free(t0);
}
+static inline void gen_align_no_le(DisasContext *ctx)
+{
+ gen_exception_err(ctx, POWERPC_EXCP_ALIGN,
+ (ctx->opcode & 0x03FF0000) | POWERPC_EXCP_ALIGN_LE);
+}
+
/*** Integer load ***/
static inline void gen_qemu_ld8u(DisasContext *ctx, TCGv arg1, TCGv arg2)
{
@@ -2432,10 +2438,9 @@ static void gen_lq(DisasContext *ctx)
}
if (!le_is_supported && ctx->le_mode) {
- gen_exception_err(ctx, POWERPC_EXCP_ALIGN, POWERPC_EXCP_ALIGN_LE);
+ gen_align_no_le(ctx);
return;
}
-
ra = rA(ctx->opcode);
rd = rD(ctx->opcode);
if (unlikely((rd & 1) || rd == ra)) {
@@ -2566,7 +2571,7 @@ static void gen_std(DisasContext *ctx)
}
if (!le_is_supported && ctx->le_mode) {
- gen_exception_err(ctx, POWERPC_EXCP_ALIGN, POWERPC_EXCP_ALIGN_LE);
+ gen_align_no_le(ctx);
return;
}
--
2.7.4
- [Qemu-ppc] [PATCH 21/32] ppc: Don't update NIP on conditional trap instructions, (continued)
- [Qemu-ppc] [PATCH 21/32] ppc: Don't update NIP on conditional trap instructions, Benjamin Herrenschmidt, 2016/07/26
- [Qemu-ppc] [PATCH 24/32] ppc: Make alignment exceptions suck less, Benjamin Herrenschmidt, 2016/07/26
- [Qemu-ppc] [PATCH 27/32] ppc: Fix CFAR updates, Benjamin Herrenschmidt, 2016/07/26
- [Qemu-ppc] [PATCH 31/32] ppc: load/store multiple and string insns don't do LE, Benjamin Herrenschmidt, 2016/07/26
- [Qemu-ppc] [PATCH 28/32] ppc: Avoid double translation for lvx/lvxl/stvx/stvxl, Benjamin Herrenschmidt, 2016/07/26
- [Qemu-ppc] [PATCH 29/32] ppc: Don't set access_type on all load/stores on hash64, Benjamin Herrenschmidt, 2016/07/26
- [Qemu-ppc] [PATCH 30/32] ppc: Use a helper to generate "LE unsupported" alignment interrupts,
Benjamin Herrenschmidt <=
- [Qemu-ppc] [PATCH 22/32] ppc: Don't update NIP if not taking alignment exceptions, Benjamin Herrenschmidt, 2016/07/26
- [Qemu-ppc] [PATCH 26/32] ppc: Speed up dcbz, Benjamin Herrenschmidt, 2016/07/26
- [Qemu-ppc] [PATCH 32/32] ppc: Speed up load/store multiple, Benjamin Herrenschmidt, 2016/07/26
- [Qemu-ppc] [PATCH 14/32] ppc: Don't update NIP in lmw/stmw/icbi, Benjamin Herrenschmidt, 2016/07/26
- [Qemu-ppc] [PATCH 23/32] ppc: Don't update NIP in dcbz and lscbx, Benjamin Herrenschmidt, 2016/07/26
- [Qemu-ppc] [PATCH 17/32] ppc: Fix source NIP on SLB related interrupts, Benjamin Herrenschmidt, 2016/07/26